diff options
| author | Ye Li <ye.li@nxp.com> | 2020-01-15 22:56:24 -0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2020-01-20 01:18:46 -0800 |
| commit | 0917c6768a7879f28f93f1493528041f51974dea (patch) | |
| tree | cd54fd9c4b518e3bad76eaca8cae504d15bc2530 /arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | |
| parent | 3fcf0c3f23b89be4bfaf7bb1eca15e25c930c505 (diff) | |
MLK-23243-2 arm64: dts: Add new DTS imx8x-mek for MEK common nodes
Abstract the MEK board DTS nodes to common files imx8x-mek.dtsi
and imx8x-mek-rpmsg.dtsi. So that we can share the board nodes
between 8QXP and 8DX MEK DTS
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit e1a4c61d3c0f9593ec0d2292cc4d510bcb59a01f)
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-mek.dts')
| -rw-r--r--[-rwxr-xr-x] | arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 1422 |
1 files changed, 2 insertions, 1420 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 779fcd75b163..715a52a5abbe 100755..100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -1,1432 +1,14 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2017~2018 NXP + * Copyright 2017-2020 NXP */ /dts-v1/; -#include <dt-bindings/usb/pd.h> #include "imx8qxp.dtsi" +#include "imx8x-mek.dtsi" / { model = "Freescale i.MX8QXP MEK"; compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp"; - - chosen { - stdout-path = &lpuart0; - }; - - brcmfmac: brcmfmac { - compatible = "cypress,brcmfmac"; - pinctrl-names = "init", "idle", "default"; - pinctrl-0 = <&pinctrl_wifi_init>; - pinctrl-1 = <&pinctrl_wifi_init>; - pinctrl-2 = <&pinctrl_wifi>; - }; - - lvds_backlight0: lvds_backlight@0 { - compatible = "pwm-backlight"; - pwms = <&pwm_mipi_lvds0 0 100000 0>; - - brightness-levels = < 0 1 2 3 4 5 6 7 8 9 - 10 11 12 13 14 15 16 17 18 19 - 20 21 22 23 24 25 26 27 28 29 - 30 31 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 48 49 - 50 51 52 53 54 55 56 57 58 59 - 60 61 62 63 64 65 66 67 68 69 - 70 71 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 88 89 - 90 91 92 93 94 95 96 97 98 99 - 100>; - default-brightness-level = <80>; - }; - - lvds_backlight1: lvds_backlight@1 { - compatible = "pwm-backlight"; - pwms = <&pwm_mipi_lvds1 0 100000 0>; - - brightness-levels = < 0 1 2 3 4 5 6 7 8 9 - 10 11 12 13 14 15 16 17 18 19 - 20 21 22 23 24 25 26 27 28 29 - 30 31 32 33 34 35 36 37 38 39 - 40 41 42 43 44 45 46 47 48 49 - 50 51 52 53 54 55 56 57 58 59 - 60 61 62 63 64 65 66 67 68 69 - 70 71 72 73 74 75 76 77 78 79 - 80 81 82 83 84 85 86 87 88 89 - 90 91 92 93 94 95 96 97 98 99 - 100>; - default-brightness-level = <80>; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x00000000 0x80000000 0 0x40000000>; - }; - - modem_reset: modem-reset { - compatible = "gpio-reset"; - reset-gpios = <&pca9557_a 1 GPIO_ACTIVE_LOW>; - reset-delay-us = <2000>; - reset-post-delay-ms = <40>; - #reset-cells = <0>; - }; - - cbtl04gp { - compatible = "nxp,cbtl04gp"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_typec_mux>; - switch-gpios = <&lsio_gpio5 9 GPIO_ACTIVE_LOW>; - reset-gpios = <&pca9557_a 7 GPIO_ACTIVE_HIGH>; - orientation-switch; - - port { - usb3_data_ss: endpoint { - remote-endpoint = <&typec_con_ss>; - }; - }; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - /* - * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4 - * Shouldn't be used at A core and Linux side. - * - */ - m4_reserved: m4@0x88000000 { - no-map; - reg = <0 0x88000000 0 0x8000000>; - }; - - rpmsg_reserved: rpmsg@0x90000000 { - no-map; - reg = <0 0x90000000 0 0x400000>; - }; - - rpmsg_dma_reserved:rpmsg_dma@0x90400000 { - compatible = "shared-dma-pool"; - no-map; - reg = <0 0x90400000 0 0x100000>; - }; - - decoder_boot: decoder-boot@84000000 { - reg = <0 0x84000000 0 0x2000000>; - no-map; - }; - - encoder_boot: encoder-boot@86000000 { - reg = <0 0x86000000 0 0x200000>; - no-map; - }; - - decoder_rpc: decoder-rpc@0x92000000 { - reg = <0 0x92000000 0 0x200000>; - no-map; - }; - - encoder_rpc: encoder-rpc@0x92200000 { - reg = <0 0x92200000 0 0x200000>; - no-map; - }; - encoder_reserved: encoder_reserved@94400000 { - no-map; - reg = <0 0x94400000 0 0x800000>; - }; - /* global autoconfigured region for contiguous allocations */ - linux,cma { - compatible = "shared-dma-pool"; - reusable; - size = <0 0x3c000000>; - alloc-ranges = <0 0x96000000 0 0x3c000000>; - linux,cma-default; - }; - }; - - reg_usdhc2_vmmc: usdhc2-vmmc { - compatible = "regulator-fixed"; - regulator-name = "SD1_SPWR"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; - off-on-delay-us = <3480>; - enable-active-high; - }; - - reg_can_en: regulator-can-en { - compatible = "regulator-fixed"; - regulator-name = "can-en"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&pca6416 3 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_can_stby: regulator-can-stby { - compatible = "regulator-fixed"; - regulator-name = "can-stby"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&pca6416 5 GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <®_can_en>; - }; - - reg_fec2_supply: fec2_nvcc { - compatible = "regulator-fixed"; - regulator-name = "fec2_nvcc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&max7322 0 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_usb_otg1_vbus: regulator-usbotg1-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&pca9557_b 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_audio: fixedregulator@2 { - compatible = "regulator-fixed"; - regulator-name = "cs42888_supply"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - sound-cs42888 { - compatible = "fsl,imx8qm-sabreauto-cs42888", - "fsl,imx-audio-cs42888"; - model = "imx-cs42888"; - esai-controller = <&esai0>; - audio-codec = <&cs42888>; - asrc-controller = <&asrc0>; - status = "okay"; - }; - - sound-wm8960 { - compatible = "fsl,imx7d-evk-wm8960", - "fsl,imx-audio-wm8960"; - model = "wm8960-audio"; - cpu-dai = <&sai1>; - audio-codec = <&wm8960>; - codec-master; - /* - * hp-det = <hp-det-pin hp-det-polarity>; - * hp-det-pin: JD1 JD2 or JD3 - * hp-det-polarity = 0: hp detect high for headphone - * hp-det-polarity = 1: hp detect high for speaker - */ - hp-det = <2 0>; - hp-det-gpios = <&lsio_gpio1 0 0>; - mic-det-gpios = <&lsio_gpio1 0 0>; - audio-routing = - "Headphone Jack", "HP_L", - "Headphone Jack", "HP_R", - "Ext Spk", "SPK_LP", - "Ext Spk", "SPK_LN", - "Ext Spk", "SPK_RP", - "Ext Spk", "SPK_RN", - "LINPUT2", "Mic Jack", - "LINPUT3", "Mic Jack", - "RINPUT1", "Main MIC", - "RINPUT2", "Main MIC", - "Mic Jack", "MICB", - "Main MIC", "MICB", - "Playback", "CPU-Playback", - "CPU-Capture", "Capture"; - }; -}; - -&cm40_i2c { - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <100000>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_cm40_i2c>; - pinctrl-1 = <&pinctrl_cm40_i2c_gpio>; - scl-gpios = <&lsio_gpio1 10 GPIO_ACTIVE_HIGH>; - sda-gpios = <&lsio_gpio1 9 GPIO_ACTIVE_HIGH>; - status = "okay"; - - pca6416: gpio@20 { - compatible = "ti,tca6416"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; - - wm8960: wm8960@1a { - compatible = "wlf,wm8960"; - reg = <0x1a>; - clocks = <&mclkout0_lpcg 0>; - clock-names = "mclk"; - wlf,shared-lrclk; - power-domains = <&pd IMX_SC_R_MCLK_OUT_0>; - assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, - <&mclkout0_lpcg 0>; - assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; - }; - - cs42888: cs42888@48 { - compatible = "cirrus,cs42888"; - reg = <0x48>; - clocks = <&mclkout0_lpcg 0>; - clock-names = "mclk"; - VA-supply = <®_audio>; - VD-supply = <®_audio>; - VLS-supply = <®_audio>; - VLC-supply = <®_audio>; - reset-gpio = <&pca9557_b 1 GPIO_ACTIVE_LOW>; - power-domains = <&pd IMX_SC_R_MCLK_OUT_0>, - <&pd IMX_SC_R_AUDIO_CLK_0>, - <&pd IMX_SC_R_AUDIO_CLK_1>, - <&pd IMX_SC_R_AUDIO_PLL_0>, - <&pd IMX_SC_R_AUDIO_PLL_1>; - power-domain-names = "pd_mclk_out_0", - "pd_audio_clk_0", - "pd_audio_clk_1", - "pd_audio_clk_0", - "pd_audio_clk_1"; - assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, - <&mclkout0_lpcg 0>; - assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; - fsl,txs-rxm; - }; - - ov5640: ov5640@3c { - compatible = "ovti,ov5640"; - reg = <0x3c>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_parallel_csi>; - clocks = <&pi0_misc_lpcg 0>; - assigned-clocks = <&pi0_misc_lpcg 0>; - assigned-clock-rates = <24000000>; - clock-names = "xclk"; - powerdown-gpios = <&lsio_gpio3 2 GPIO_ACTIVE_HIGH>; - reset-gpios = <&lsio_gpio3 3 GPIO_ACTIVE_LOW>; - csi_id = <0>; - mclk = <24000000>; - mclk_source = <0>; - status = "okay"; - port { - ov5640_ep: endpoint { - remote-endpoint = <¶llel_csi_ep>; - bus-type = <5>; /* V4L2_FWNODE_BUS_TYPE_PARALLEL */ - bus-width = <8>; - vsync-active = <0>; - hsync-active = <1>; - pclk-sample = <1>; - }; - }; - }; -}; - -&cm40_intmux { - status = "okay"; -}; - -&dc0_pc { - status = "okay"; -}; - -&dc0_prg1 { - status = "okay"; -}; - -&dc0_prg2 { - status = "okay"; - -}; - -&dc0_prg3 { - status = "okay"; -}; - -&dc0_prg4 { - status = "okay"; -}; - -&dc0_prg5 { - status = "okay"; -}; - -&dc0_prg6 { - status = "okay"; -}; - -&dc0_prg7 { - status = "okay"; -}; - -&dc0_prg8 { - status = "okay"; -}; - -&dc0_prg9 { - status = "okay"; -}; - -&dc0_dpr1_channel1 { - status = "okay"; -}; - -&dc0_dpr1_channel2 { - status = "okay"; -}; - -&dc0_dpr1_channel3 { - status = "okay"; -}; - -&dc0_dpr2_channel1 { - status = "okay"; -}; - -&dc0_dpr2_channel2 { - status = "okay"; -}; - -&dc0_dpr2_channel3 { - status = "okay"; -}; - -&dpu1 { - status = "okay"; -}; - -&pwm_mipi_lvds0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm_mipi_lvds0>; - status = "okay"; -}; - -&i2c0_mipi_lvds0 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>; - clock-frequency = <100000>; - status = "okay"; - - lvds_bridge0: lvds-to-hdmi-bridge@4c { - compatible = "ite,it6263"; - reg = <0x4c>; - reset-gpios = <&pca9557_a 6 GPIO_ACTIVE_LOW>; - - port { - it6263_0_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - }; - - adv_bridge0: adv7535@3d { - #address-cells = <1>; - #size-cells = <0>; - - compatible = "adi,adv7535"; - reg = <0x3d>; - adi,addr-cec = <0x3b>; - adi,dsi-lanes = <4>; - adi,dsi-channel = <1>; - interrupt-parent = <&lsio_gpio1>; - interrupts = <28 IRQ_TYPE_LEVEL_LOW>; - status = "okay"; - - port@0 { - reg = <0>; - adv7535_0_in: endpoint { - remote-endpoint = <&mipi0_adv_out>; - }; - }; - }; -}; - -&ldb1_phy { - status = "okay"; -}; - -&ldb1 { - status = "okay"; - - lvds-channel@0 { - fsl,data-mapping = "jeida"; - fsl,data-width = <24>; - status = "okay"; - - port@1 { - reg = <1>; - - lvds0_out: endpoint { - remote-endpoint = <&it6263_0_in>; - }; - }; - }; -}; - -&mipi0_dphy { - status = "okay"; -}; - -&mipi0_dsi_host { - status = "okay"; - - ports { - port@1 { - reg = <1>; - mipi0_adv_out: endpoint { - remote-endpoint = <&adv7535_0_in>; - }; - }; - }; -}; - -&pwm_mipi_lvds1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm_mipi_lvds1>; - status = "okay"; -}; - -&i2c0_mipi_lvds1 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>; - clock-frequency = <100000>; - status = "okay"; - - lvds_bridge1: lvds-to-hdmi-bridge@4c { - compatible = "ite,it6263"; - reg = <0x4c>; - reset-gpios = <&pca9557_b 7 GPIO_ACTIVE_LOW>; - - port { - it6263_1_in: endpoint { - remote-endpoint = <&lvds1_out>; - }; - }; - }; - - adv_bridge1: adv7535@3d { - #address-cells = <1>; - #size-cells = <0>; - - compatible = "adi,adv7535"; - reg = <0x3d>; - adi,addr-cec = <0x3b>; - adi,dsi-lanes = <4>; - adi,dsi-channel = <1>; - interrupt-parent = <&lsio_gpio2>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - status = "okay"; - - port@0 { - reg = <0>; - adv7535_1_in: endpoint { - remote-endpoint = <&mipi1_adv_out>; - }; - }; - }; -}; - -&ldb2_phy { - status = "okay"; -}; - -&ldb2 { - status = "okay"; - - lvds-channel@0 { - fsl,data-mapping = "jeida"; - fsl,data-width = <24>; - status = "okay"; - - port@1 { - reg = <1>; - - lvds1_out: endpoint { - remote-endpoint = <&it6263_1_in>; - }; - }; - }; -}; - -&mipi1_dphy { - status = "okay"; -}; - -&mipi1_dsi_host { - status = "okay"; - - ports { - port@1 { - reg = <1>; - mipi1_adv_out: endpoint { - remote-endpoint = <&adv7535_1_in>; - }; - }; - }; -}; - -&lpuart0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart0>; - status = "okay"; -}; - -&lpuart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart1>; - resets = <&modem_reset>; - status = "okay"; -}; - -&lpuart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart2>; - status = "okay"; -}; - -&lpuart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart3>; - status = "okay"; -}; - -&flexcan1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1>; - xceiver-supply = <®_can_stby>; - status = "okay"; -}; - -&flexcan2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan2>; - xceiver-supply = <®_can_stby>; - status = "okay"; -}; - -&amix { - status = "okay"; -}; - -&asrc0 { - fsl,asrc-rate = <48000>; - status = "okay"; -}; - -&dsp { - compatible = "fsl,imx8qxp-dsp-v1"; - status = "okay"; -}; - -&esai0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_esai0>; - assigned-clocks = <&acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, - <&esai0_lpcg 0>; - assigned-clock-parents = <&aud_pll_div0_lpcg 0>; - assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>; - fsl,txm-rxs; - status = "okay"; -}; - -&sai1 { - assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, - <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, - <&sai1_lpcg 0>; /* FIXME: should be sai1, original code is 0 */ - assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai1>; - status = "okay"; -}; - -&sai4 { - assigned-clocks = <&acm IMX_ADMA_ACM_SAI4_MCLK_SEL>, - <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, - <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, - <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, - <&sai4_lpcg 0>; - assigned-clock-parents = <&aud_pll_div1_lpcg 0>; - assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>; - fsl,sai-asynchronous; - fsl,txm-rxs; - status = "okay"; -}; - -&sai5 { - assigned-clocks = <&acm IMX_ADMA_ACM_SAI5_MCLK_SEL>, - <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, - <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, - <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, - <&sai5_lpcg 0>; - assigned-clock-parents = <&aud_pll_div1_lpcg 0>; - assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>; - fsl,sai-asynchronous; - fsl,txm-rxs; - status = "okay"; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1>; - phy-mode = "rgmii-txid"; - phy-handle = <ðphy0>; - fsl,magic-packet; - nvmem-cells = <&fec_mac0>; - nvmem-cell-names = "mac-address"; - fsl,rgmii_rxc_dly; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - at803x,eee-disabled; - at803x,vddio-1p8v; - }; - - ethphy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - at803x,eee-disabled; - at803x,vddio-1p8v; - status = "disabled"; - }; - }; -}; - -&fec2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec2>; - phy-mode = "rgmii-txid"; - phy-handle = <ðphy1>; - phy-supply = <®_fec2_supply>; - fsl,magic-packet; - nvmem-cells = <&fec_mac1>; - nvmem-cell-names = "mac-address"; - fsl,rgmii_rxc_dly; - status = "disabled"; -}; - -&flexspi0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexspi0>; - status = "okay"; - - flash0: mt35xu512aba@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - spi-max-frequency = <133000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - }; -}; - -&i2c1 { - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>; - status = "okay"; - - i2c-switch@71 { - compatible = "nxp,pca9646", "nxp,pca9546"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x71>; - reset-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>; - - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - max7322: gpio@68 { - compatible = "maxim,max7322"; - reg = <0x68>; - gpio-controller; - #gpio-cells = <2>; - }; - }; - - i2c@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - }; - - i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - - fxos8700@1e { - compatible = "fsl,fxos8700"; - reg = <0x1e>; - interrupt-open-drain; - }; - - fxas2100x@21 { - compatible = "fsl,fxas2100x"; - reg = <0x21>; - interrupt-open-drain; - }; - - pressure-sensor@60 { - compatible = "fsl,mpl3115"; - reg = <0x60>; - interrupt-open-drain; - }; - }; - - i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - - pca9557_a: gpio@1a { - compatible = "nxp,pca9557"; - reg = <0x1a>; - gpio-controller; - #gpio-cells = <2>; - }; - - pca9557_b: gpio@1d { - compatible = "nxp,pca9557"; - reg = <0x1d>; - gpio-controller; - #gpio-cells = <2>; - }; - - isl29023@44 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_isl29023>; - compatible = "fsl,isl29023"; - reg = <0x44>; - rext = <499>; - interrupt-parent = <&lsio_gpio1>; - interrupts = <2 IRQ_TYPE_EDGE_FALLING>; - }; - }; - }; - - ptn5110: tcpc@50 { - compatible = "nxp,ptn5110"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_typec>; - reg = <0x50>; - interrupt-parent = <&lsio_gpio1>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - status = "okay"; - - usb_con1: connector { - compatible = "usb-c-connector"; - label = "USB-C"; - power-role = "source"; - data-role = "dual"; - source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - typec_con_ss: endpoint { - remote-endpoint = <&usb3_data_ss>; - }; - }; - }; - }; - }; -}; - -&pcieb{ - compatible = "fsl,imx8qxp-pcie","snps,dw-pcie"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcieb>; - disable-gpio = <&pca9557_a 2 GPIO_ACTIVE_LOW>; - reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; - ext_osc = <1>; - reserved-region = <&rpmsg_reserved>; - status = "okay"; -}; - -&rpmsg{ - /* - * 64K for one rpmsg instance: - */ - vdev-nums = <2>; - reg = <0x0 0x90000000 0x0 0x20000>; - memory-region = <&rpmsg_dma_reserved>; - status = "okay"; -}; - -&usbphy1 { - status = "okay"; -}; - -&usbotg1 { - vbus-supply = <®_usb_otg1_vbus>; - srp-disable; - hnp-disable; - adp-disable; - power-active-high; - disable-over-current; - status = "okay"; -}; - -&usb3phynop1 { - status = "okay"; -}; - -&usbotg3 { - dr_mode = "otg"; - extcon = <&ptn5110>; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1>; - bus-width = <8>; - no-sd; - no-sdio; - non-removable; - status = "okay"; -}; - -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - bus-width = <4>; - vmmc-supply = <®_usdhc2_vmmc>; - cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>; - wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&vpu_decoder { - boot-region = <&decoder_boot>; - rpc-region = <&decoder_rpc>; - reg-csr = <0x2d040000>; - core_type = <1>; - status = "okay"; -}; - -&vpu_encoder { - boot-region = <&encoder_boot>; - rpc-region = <&encoder_rpc>; - reserved-region = <&encoder_reserved>; - reg-rpc-system = <0x40000000>; - resolution-max = <1920 1080>; - mbox-names = "enc1_tx0", "enc1_tx1", "enc1_rx"; - mboxes = <&mu1_m0 0 0 - &mu1_m0 0 1 - &mu1_m0 1 0>; - status = "okay"; - - core0@1020000 { - compatible = "fsl,imx8-mu1-vpu-m0"; - reg = <0x1020000 0x20000>; - reg-csr = <0x1050000 0x10000>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>; - fsl,vpu_ap_mu_id = <17>; - fw-buf-size = <0x200000>; - rpc-buf-size = <0x80000>; - print-buf-size = <0x80000>; - }; -}; - -&gpu_3d0 { - status = "okay"; -}; - -&imx8_gpu_ss { - status = "okay"; -}; - -&isi_0 { - status = "okay"; - - cap_device { - status = "okay"; - }; - - m2m_device { - status = "okay"; - }; -}; - -&isi_1 { - status = "okay"; - - cap_device { - status = "okay"; - }; -}; - -&isi_2 { - status = "okay"; - - cap_device { - status = "okay"; - }; -}; - -&isi_3 { - status = "okay"; - - cap_device { - status = "okay"; - }; -}; - -&isi_4 { - interface = <6 0 2>; - status = "okay"; - - cap_device { - status = "okay"; - }; -}; - -&irqsteer_csi0 { - status = "okay"; -}; - - -&mipi_csi_0 { - #address-cells = <1>; - #size-cells = <0>; - virtual-channel; - status = "okay"; - - /* Camera 0 MIPI CSI-2 (CSIS0) */ - port@0 { - reg = <0>; - mipi_csi0_ep: endpoint { - remote-endpoint = <&max9286_0_ep>; - data-lanes = <1 2 3 4>; - }; - }; -}; - -&cameradev { - parallel_csi; - status = "okay"; -}; - -¶llel_csi { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - port@0 { - reg = <0>; - parallel_csi_ep: endpoint { - remote-endpoint = <&ov5640_ep>; - }; - }; -}; - -&jpegdec { - status = "okay"; -}; - -&jpegenc { - status = "okay"; -}; - -&i2c_mipi_csi0 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c_mipi_csi0>; - clock-frequency = <100000>; - status = "okay"; - - max9286_mipi@6a { - compatible = "maxim,max9286_mipi"; - reg = <0x6a>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mipi_csi0>; - clocks = <&clk_dummy>; - clock-names = "capture_mclk"; - mclk = <27000000>; - mclk_source = <0>; - pwn-gpios = <&lsio_gpio3 7 GPIO_ACTIVE_HIGH>; - virtual-channel; - status = "okay"; - port { - max9286_0_ep: endpoint { - remote-endpoint = <&mipi_csi0_ep>; - data-lanes = <1 2 3 4>; - }; - }; - }; -}; - -&thermal_zones { - pmic-thermal0 { - polling-delay-passive = <250>; - polling-delay = <2000>; - thermal-sensors = <&tsens 497>; - trips { - pmic_alert0: trip0 { - temperature = <110000>; - hysteresis = <2000>; - type = "passive"; - }; - pmic_crit0: trip1 { - temperature = <125000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&pmic_alert0>; - cooling-device = - <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - pinctrl_hog: hoggrp { - fsl,pins = < - IMX8QXP_MCLK_OUT0_ADMA_ACM_MCLK_OUT0 0x0600004c - IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 - >; - }; - - pinctrl_cm40_i2c: cm40i2cgrp { - fsl,pins = < - IMX8QXP_ADC_IN1_M40_I2C0_SDA 0x0600004c - IMX8QXP_ADC_IN0_M40_I2C0_SCL 0x0600004c - >; - }; - - pinctrl_cm40_i2c_gpio: cm40i2cgrp-gpio { - fsl,pins = < - IMX8QXP_ADC_IN1_LSIO_GPIO1_IO09 0xc600004c - IMX8QXP_ADC_IN0_LSIO_GPIO1_IO10 0xc600004c - >; - }; - - pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp { - fsl,pins = < - IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 - IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 - IMX8QXP_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO28 0x00000020 - >; - }; - - pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp { - fsl,pins = < - IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 - IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 - IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x00000020 - >; - }; - - pinctrl_esai0: esai0grp { - fsl,pins = < - IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR 0xc6000040 - IMX8QXP_ESAI0_FST_ADMA_ESAI0_FST 0xc6000040 - IMX8QXP_ESAI0_SCKR_ADMA_ESAI0_SCKR 0xc6000040 - IMX8QXP_ESAI0_SCKT_ADMA_ESAI0_SCKT 0xc6000040 - IMX8QXP_ESAI0_TX0_ADMA_ESAI0_TX0 0xc6000040 - IMX8QXP_ESAI0_TX1_ADMA_ESAI0_TX1 0xc6000040 - IMX8QXP_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3 0xc6000040 - IMX8QXP_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2 0xc6000040 - IMX8QXP_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1 0xc6000040 - IMX8QXP_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0 0xc6000040 - >; - }; - - pinctrl_fec1: fec1grp { - fsl,pins = < - IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0 - IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0 - IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 - IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 - IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 - IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 - IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 - IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 - IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 - IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 - IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 - IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 - IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 - IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 - IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 - IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 - >; - }; - - pinctrl_fec2: fec2grp { - fsl,pins = < - IMX8QXP_ESAI0_SCKR_CONN_ENET1_RGMII_TX_CTL 0x00000060 - IMX8QXP_ESAI0_FSR_CONN_ENET1_RGMII_TXC 0x00000060 - IMX8QXP_ESAI0_TX4_RX1_CONN_ENET1_RGMII_TXD0 0x00000060 - IMX8QXP_ESAI0_TX5_RX0_CONN_ENET1_RGMII_TXD1 0x00000060 - IMX8QXP_ESAI0_FST_CONN_ENET1_RGMII_TXD2 0x00000060 - IMX8QXP_ESAI0_SCKT_CONN_ENET1_RGMII_TXD3 0x00000060 - IMX8QXP_ESAI0_TX0_CONN_ENET1_RGMII_RXC 0x00000060 - IMX8QXP_SPDIF0_TX_CONN_ENET1_RGMII_RX_CTL 0x00000060 - IMX8QXP_SPDIF0_RX_CONN_ENET1_RGMII_RXD0 0x00000060 - IMX8QXP_ESAI0_TX3_RX2_CONN_ENET1_RGMII_RXD1 0x00000060 - IMX8QXP_ESAI0_TX2_RX3_CONN_ENET1_RGMII_RXD2 0x00000060 - IMX8QXP_ESAI0_TX1_CONN_ENET1_RGMII_RXD3 0x00000060 - >; - }; - - pinctrl_flexspi0: flexspi0grp { - fsl,pins = < - IMX8QXP_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 0x06000021 - IMX8QXP_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 0x06000021 - IMX8QXP_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 0x06000021 - IMX8QXP_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 0x06000021 - IMX8QXP_QSPI0A_DQS_LSIO_QSPI0A_DQS 0x06000021 - IMX8QXP_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 0x06000021 - IMX8QXP_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B 0x06000021 - IMX8QXP_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 0x06000021 - IMX8QXP_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 0x06000021 - IMX8QXP_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 0x06000021 - IMX8QXP_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 0x06000021 - IMX8QXP_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 0x06000021 - IMX8QXP_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 0x06000021 - IMX8QXP_QSPI0B_DQS_LSIO_QSPI0B_DQS 0x06000021 - IMX8QXP_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 0x06000021 - IMX8QXP_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B 0x06000021 - >; - }; - - pinctrl_ioexp_rst: ioexp_rst_grp { - fsl,pins = < - IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021 - >; - }; - - pinctrl_isl29023: isl29023grp { - fsl,pins = < - IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02 0x00000021 - >; - }; - - pinctrl_lpi2c1: lpi2c1grp { - fsl,pins = < - IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000021 - IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA 0x06000021 - >; - }; - - pinctrl_flexcan1: flexcan0grp { - fsl,pins = < - IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 - IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 - >; - }; - - pinctrl_flexcan2: flexcan1grp { - fsl,pins = < - IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 - IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 - >; - }; - - pinctrl_lpuart0: lpuart0grp { - fsl,pins = < - IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 - IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 - >; - }; - - pinctrl_lpuart1: lpuart1grp { - fsl,pins = < - IMX8QXP_UART1_TX_ADMA_UART1_TX 0x06000020 - IMX8QXP_UART1_RX_ADMA_UART1_RX 0x06000020 - IMX8QXP_UART1_RTS_B_ADMA_UART1_RTS_B 0x06000020 - IMX8QXP_UART1_CTS_B_ADMA_UART1_CTS_B 0x06000020 - >; - }; - - pinctrl_lpuart2: lpuart2grp { - fsl,pins = < - IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 - IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 - >; - }; - - pinctrl_lpuart3: lpuart3grp { - fsl,pins = < - IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 - IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 - >; - }; - - pinctrl_pcieb: pcieagrp{ - fsl,pins = < - IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000021 - IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x06000021 - IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000021 - >; - }; - - pinctrl_pwm_mipi_lvds0: mipi_lvds0_pwm_grp { - fsl,pins = < - IMX8QXP_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT 0x00000020 - >; - }; - - pinctrl_pwm_mipi_lvds1: mipi_lvds1_pwm_grp { - fsl,pins = < - IMX8QXP_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT 0x00000020 - >; - }; - - pinctrl_sai1: sai1grp { - fsl,pins = < - IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD 0x06000040 - IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC 0x06000040 - IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS 0x06000040 - IMX8QXP_SPI0_CS1_ADMA_SAI1_TXD 0x06000060 - IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x06000040 - >; - }; - - pinctrl_typec: typecgrp { - fsl,pins = < - IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03 0x06000021 - >; - }; - - pinctrl_typec_mux: typecmuxgrp { - fsl,pins = < - IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x60 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 - IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 - IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 - IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 - IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 - IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 - IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 - IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 - IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 - IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 - IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 - >; - }; - - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins = < - IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x00000021 - IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x00000021 - IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x00000021 - >; - }; - - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 - IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 - IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 - IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 - IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 - IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 - IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 - >; - }; - - pinctrl_i2c_mipi_csi0: i2c_mipi_csi0 { - fsl,pins = < - IMX8QXP_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL 0xc2000020 - IMX8QXP_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA 0xc2000020 - >; - }; - - pinctrl_mipi_csi0: mipi_csi0 { - fsl,pins = < - IMX8QXP_MIPI_CSI0_GPIO0_01_LSIO_GPIO3_IO07 0xC0000041 - IMX8QXP_MIPI_CSI0_GPIO0_00_LSIO_GPIO3_IO08 0xC0000041 - IMX8QXP_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041 - >; - }; - - pinctrl_parallel_csi: parallelcsigrp { - fsl,pins = < - IMX8QXP_CSI_D00_CI_PI_D02 0xC0000041 - IMX8QXP_CSI_D01_CI_PI_D03 0xC0000041 - IMX8QXP_CSI_D02_CI_PI_D04 0xC0000041 - IMX8QXP_CSI_D03_CI_PI_D05 0xC0000041 - IMX8QXP_CSI_D04_CI_PI_D06 0xC0000041 - IMX8QXP_CSI_D05_CI_PI_D07 0xC0000041 - IMX8QXP_CSI_D06_CI_PI_D08 0xC0000041 - IMX8QXP_CSI_D07_CI_PI_D09 0xC0000041 - - IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041 - IMX8QXP_CSI_PCLK_CI_PI_PCLK 0xC0000041 - IMX8QXP_CSI_HSYNC_CI_PI_HSYNC 0xC0000041 - IMX8QXP_CSI_VSYNC_CI_PI_VSYNC 0xC0000041 - IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0xC0000041 - IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0xC0000041 - >; - }; - - pinctrl_wifi: wifigrp{ - fsl,pins = < - IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20 - >; - }; - - pinctrl_wifi_init: wifi_initgrp{ - fsl,pins = < - /* reserve pin init/idle_state to support multiple wlan cards */ - >; - }; - }; |