diff options
author | Dong Aisheng <aisheng.dong@nxp.com> | 2019-07-18 21:52:54 +0800 |
---|---|---|
committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:05:01 +0800 |
commit | 954723029722a1377fe06c2c4f5749932983799f (patch) | |
tree | 626b297cb517bdf128e7c54e149648ae007eb7d4 /arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | |
parent | 464d1ca6475866a3d76148c5a17a04b9a3f4cca9 (diff) |
arm64: dts: imx8: audio: fully switched to new clk binding
fully switched to new clk binding
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-mek.dts')
-rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 82 |
1 files changed, 41 insertions, 41 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 9c84117d3ba0..66b0ddb37f2b 100755 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -137,9 +137,9 @@ compatible = "fsl,imx8qm-sabreauto-cs42888", "fsl,imx-audio-cs42888"; model = "imx-cs42888"; - esai-controller = <&adma_esai0>; + esai-controller = <&esai0>; audio-codec = <&cs42888>; - asrc-controller = <&adma_asrc0>; + asrc-controller = <&asrc0>; status = "okay"; }; @@ -147,7 +147,7 @@ compatible = "fsl,imx7d-evk-wm8960", "fsl,imx-audio-wm8960"; model = "wm8960-audio"; - cpu-dai = <&adma_sai1>; + cpu-dai = <&sai1>; audio-codec = <&wm8960>; codec-master; /* @@ -181,8 +181,8 @@ sound-amix-sai { compatible = "fsl,imx-audio-amix"; model = "amix-audio-sai"; - dais = <&adma_sai4>, <&adma_sai5>; - amix-controller = <&adma_amix>; + dais = <&sai4>, <&sai5>; + amix-controller = <&amix>; }; }; @@ -204,21 +204,21 @@ wm8960: wm8960@1a { compatible = "wlf,wm8960"; reg = <0x1a>; - clocks = <&adma_lpcg IMX_ADMA_LPCG_MCLKOUT0>; + clocks = <&mclkout0_lpcg 0>; clock-names = "mclk"; wlf,shared-lrclk; power-domains = <&pd IMX_SC_R_MCLK_OUT_0>; - assigned-clocks = <&clk IMX_ADMA_AUD_PLL0>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK0_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK0_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_MCLKOUT0>; + assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, + <&mclkout0_lpcg 0>; assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; }; cs42888: cs42888@48 { compatible = "cirrus,cs42888"; reg = <0x48>; - clocks = <&adma_lpcg IMX_ADMA_LPCG_MCLKOUT0>; + clocks = <&mclkout0_lpcg 0>; clock-names = "mclk"; VA-supply = <®_audio>; VD-supply = <®_audio>; @@ -235,10 +235,10 @@ "pd_audio_clk_1", "pd_audio_clk_0", "pd_audio_clk_1"; - assigned-clocks = <&clk IMX_ADMA_AUD_PLL0>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK0_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK0_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_MCLKOUT0>; + assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, + <&mclkout0_lpcg 0>; assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; fsl,txs-rxm; }; @@ -403,65 +403,65 @@ status = "okay"; }; -&adma_amix { +&amix { status = "okay"; }; -&adma_asrc0 { +&asrc0 { fsl,asrc-rate = <48000>; status = "okay"; }; -&adma_dsp { +&dsp { status = "okay"; }; -&adma_esai0 { +&esai0 { compatible = "fsl,imx8qm-esai"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esai0>; assigned-clocks = <&adma_acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>, - <&clk IMX_ADMA_AUD_PLL0>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK0_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK0_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_ESAI_0_EXTAL_CLK>; - assigned-clock-parents = <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK0_CLK>; + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, + <&esai0_lpcg 0>; + assigned-clock-parents = <&aud_pll_div0_lpcg 0>; assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>; fsl,txm-rxs; status = "okay"; }; -&adma_sai1 { - assigned-clocks = <&clk IMX_ADMA_AUD_PLL0>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK0_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK0_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_SAI_0_MCLK>; +&sai1 { + assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, + <&sai1_lpcg 0>; /* FIXME: should be sai1, original code is 0 */ assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai1>; status = "okay"; }; -&adma_sai4 { +&sai4 { assigned-clocks = <&adma_acm IMX_ADMA_ACM_SAI4_MCLK_SEL>, - <&clk IMX_ADMA_AUD_PLL1>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK1_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK1_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_SAI_4_MCLK>; - assigned-clock-parents = <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK1_CLK>; + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, + <&sai4_lpcg 0>; + assigned-clock-parents = <&aud_pll_div1_lpcg 0>; assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>; fsl,sai-asynchronous; fsl,txm-rxs; status = "okay"; }; -&adma_sai5 { +&sai5 { assigned-clocks = <&adma_acm IMX_ADMA_ACM_SAI5_MCLK_SEL>, - <&clk IMX_ADMA_AUD_PLL1>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK1_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK1_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_SAI_5_MCLK>; - assigned-clock-parents = <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK1_CLK>; + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, + <&sai5_lpcg 0>; + assigned-clock-parents = <&aud_pll_div1_lpcg 0>; assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>; fsl,sai-asynchronous; fsl,txm-rxs; |