diff options
author | Liu Ying <victor.liu@nxp.com> | 2020-03-30 12:19:49 +0800 |
---|---|---|
committer | Liu Ying <victor.liu@nxp.com> | 2020-04-10 15:23:56 +0800 |
commit | 64b07f682ba45f0fda3b716afe673c9b5a72bc19 (patch) | |
tree | 15cccbcdd23f6b54061425a661d3d4a570072563 /arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi | |
parent | b4bf1bab57203c3ffc9ef3b4df21297e3a2b1fc6 (diff) |
LF-1189-10 arm64: imx8qxp-ss-adma.dtsi: Add pwm support
This patch adds pwm device tree support for i.MX8qxp ADMA support.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi index 01938030b4c9..096df87e0c99 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-adma.dtsi @@ -75,6 +75,18 @@ reg = <0x5a170000 0x4>; }; + adma_pwm: pwm@5a190000 { + compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm"; + reg = <0x5a190000 0x1000>; + clocks = <&adma_pwm_lpcg 0>, <&adma_pwm_lpcg 1>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>; + status = "disabled"; + }; + adma_pwm_lpcg: clock-controller@5a590000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5a590000 0x10000>; |