diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2019-02-11 15:14:51 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:04 +0800 |
| commit | be9cf2f5b4f02d5a0b9518f1554fdf059cb43c48 (patch) | |
| tree | fb6393e203bd2b50e8c5f0c6e847fe4ddeaadade /arch/arm64/boot/dts/freescale/imx8qxp.dtsi | |
| parent | f7f61382041ab3c21ec7408c2d3458a91ce6fabc (diff) | |
arm64: dts: freescale: imx8qxp: add cpu opp table
Add CPU opp table for cpu-freq.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index 4c0b8d333c1e..4fb7bf54f630 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -331,3 +331,15 @@ &edma2 { status = "okay"; }; + +&A35_0 { + operating-points = < + /* kHz uV*/ + /* voltage is maintained by SCFW, so no need here */ + 1200000 0 + 900000 0 + >; + clocks = <&clk IMX_A35_CLK>; + clock-latency = <61036>; + #cooling-cells = <2>; +}; |