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authorDong Aisheng <aisheng.dong@nxp.com>2021-11-30 14:59:21 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2021-11-30 14:59:21 +0800
commitc6e5e719e2331ba93231b2ffd793aadc6f2f53db (patch)
tree7f9a97d3784ceb04fbe50ea372f858102d397df6 /arch/arm64/boot/dts/freescale/imx8ulp-evk-nd.dts
parent34c0c0cf4f24f5d18d427305465ff48a18d42019 (diff)
parentdc9fe76760c4dba2e2296cfbb4be7a0cd575d4e8 (diff)
Merge remote-tracking branch 'origin/dts/imx8ulp' into dts/next
* origin/dts/imx8ulp: (112 commits) LF-5015-3 arm64: dts: imx8ulp-evk: Add RK055HDMIPI4MV2 MIPI DSI display panel support LF-4822-2 arm64: dts: imx8ulp: Assign pinctrl state for sai5 on 8ulp for SOF LF-4776 dtb: updated dev sentnl-mu with dma-ranges MLK-25252: dts: imx8ulp add mu_id & max_num_users Revert "MLK25252: dts: imx8ulp add id-no & max_num_users to s4muap." ...
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8ulp-evk-nd.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8ulp-evk-nd.dts48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk-nd.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk-nd.dts
new file mode 100644
index 000000000000..484f7176e8e4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk-nd.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 NXP
+ */
+
+#include "imx8ulp-evk.dts"
+
+&gpu3d {
+ assigned-clock-rates = <200000000>, <200000000>, <200000000>;
+};
+
+&gpu2d {
+ assigned-clock-rates = <200000000>, <200000000>, <200000000>;
+};
+
+&dcnano {
+ /* Place Holder */
+};
+
+&mipi_csi0 {
+ /* Place Holder */
+};
+
+&epdc {
+ /* Place Holder */
+};
+
+&dsp {
+ assigned-clocks = <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>,
+ <&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>;
+ assigned-clock-rates = <260000000>, <150000000>;
+};
+
+&i3c2 {
+ assigned-clock-rates = <24000000>;
+};
+
+&usdhc0 {
+ assigned-clock-rates = <198000000>, <198000000>;
+};
+
+&usdhc1 {
+ assigned-clock-rates = <198000000>, <198000000>;
+};
+
+&usdhc2 {
+ assigned-clock-rates = <198000000>, <198000000>;
+};