diff options
author | Mirela Rabulea <mirela.rabulea@nxp.com> | 2020-03-06 22:14:56 +0200 |
---|---|---|
committer | Oliver Brown <oliver.brown@nxp.com> | 2020-04-08 10:32:22 -0500 |
commit | 636de0a39e2394ac23c261b67dcd7d2ed9128deb (patch) | |
tree | 5bf4b2655742a6ca4914d1f408a8397ca7507496 /arch/arm64/boot/dts/freescale | |
parent | 0ed47dbc11b07ff4a7eabe27307bcd552b5ffd44 (diff) |
MLK-23728: Add ov2775 dtb for imx8mp
Make sure all the needed clocks are enabled for mipi_csi,
do not rely on mipi_dsi or lcdif to enable them.
Needed: media_cam1_pix, media_axi_root, media_apb_root
Tested with VSI ISP demo.
Not tested with camera on CSI2.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Tested-by: Oliver Brown <oliver.brown@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale')
-rw-r--r-- | arch/arm64/boot/dts/freescale/Makefile | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-evk-ov2775.dts | 84 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 24 |
3 files changed, 101 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index bc3cc7a17a5b..fa91e5c72113 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -60,7 +60,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb imx8mp-evk-root.dtb imx8mp-evk-inmate.d imx8mp-evk-rm67191.dtb imx8mp-evk-hdmi.dtb imx8mp-evk-flexcan2.dtb \ imx8mp-evk-it6263-lvds-dual-channel.dtb imx8mp-evk-it6263-lvds-channel0.dtb \ imx8mp-evk-jdi-wuxga-lvds-panel.dtb imx8mp-ab2.dtb imx8mp-evk-sof-wm8960.dtb \ - imx8mp-evk-dsp.dtb + imx8mp-evk-dsp.dtb imx8mp-evk-ov2775.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb imx8mq-evk-pcie1-m2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-ak4497.dtb imx8mq-evk-audio-tdm.dtb imx8mq-evk-pdm.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-root.dtb imx8mq-evk-inmate.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-ov2775.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk-ov2775.dts new file mode 100644 index 000000000000..88581a405730 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk-ov2775.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2020 NXP + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +#include "imx8mp-evk.dts" + +&i2c2 { + ov5640_0: ov5640_mipi@3c { + status = "disabled"; + }; + + ov2775_0: ov2775_mipi@36 { + compatible = "ovti,ov2775"; + reg = <0x36>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>; + clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; + clock-names = "csi_mclk"; + assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + assigned-clock-rates = <24000000>; + csi_id = <0>; + pwn-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + rst-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + mclk = <24000000>; + mclk_source = <0>; + status = "okay"; + + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + ov5640_1: ov5640_mipi@3c { + status = "disabled"; + }; + + ov2775_1: ov2775_mipi@36 { + compatible = "ovti,ov2775"; + reg = <0x36>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>; + clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; + clock-names = "csi_mclk"; + assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; + assigned-clock-parents = <&clk IMX8MP_CLK_24M>; + assigned-clock-rates = <24000000>; + csi_id = <1>; + pwn-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + rst-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + mclk = <24000000>; + mclk_source = <0>; + status = "disabled"; + }; +}; + +&cameradev { + status = "disabled"; +}; + +&isi_0 { + status = "disabled"; +}; + +&isi_1 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 94b684762905..180a57c0c00f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1723,6 +1723,10 @@ }; }; + mediamix_gpr: media_gpr@32ec0008 { + compatible = "fsl,imx8mp-iomuxc-gpr", "syscon"; + reg = <0x32ec0008 0x4>; + }; cameradev: camera { compatible = "fsl,mxc-md", "simple-bus"; #address-cells = <1>; @@ -1787,14 +1791,16 @@ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <500000000>; clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>, - <&clk IMX8MP_CLK_MEDIA_AXI>, - <&clk IMX8MP_CLK_MEDIA_APB>; - clock-names = "mipi_clk", "disp_axi", "disp_apb"; + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + clock-names = "mipi_clk", "axi_root", "apb_root"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; assigned-clock-rates = <500000000>; bus-width = <4>; csi-gpr = <&mediamix_gasket0>; + csi-gpr2 = <&mediamix_gpr>; + gpr = <&mediamix_blk_ctl>; no-reset-control; power-domains = <&mipi_phy1_pd>; status = "disabled"; @@ -1804,16 +1810,18 @@ compatible = "fsl,imx8mp-mipi-csi", "fsl,imx8mn-mipi-csi"; reg = <0x32e50000 0x10000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <266000000>; + clock-frequency = <500000000>; clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>, - <&clk IMX8MP_CLK_MEDIA_AXI>, - <&clk IMX8MP_CLK_MEDIA_APB>; - clock-names = "mipi_clk", "disp_axi", "disp_apb"; + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + clock-names = "mipi_clk", "axi_root", "apb_root"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; - assigned-clock-rates = <266000000>; + assigned-clock-rates = <500000000>; bus-width = <4>; csi-gpr = <&mediamix_gasket1>; + csi-gpr2 = <&mediamix_gpr>; + gpr = <&mediamix_blk_ctl>; no-reset-control; power-domains = <&mipi_phy2_pd>; status = "disabled"; |