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authorZhong Kaihua <zhongkaihua@huawei.com>2016-04-13 07:55:42 +0800
committerWei Xu <xuwei5@hisilicon.com>2016-04-15 16:21:45 +0100
commit60dac1b19b6af6ddc4df68d163e2d7508057c007 (patch)
treee178cdc79a58cff1f7c55c2c96fc2b854f32f9c7 /arch/arm64/boot/dts/hisilicon/hi6220.dtsi
parent379e9bf52daaaa841ecc4eed3f2c5c86845c45a9 (diff)
arm64: dts: add Hi6220 spi configuration nodes
Add Hi6220 spi configuration nodes. Disable by default in hi6220.dtsi and enable it in board dts for usage of 96boards LS mezzanine board. Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hi6220.dtsi')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi6220.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index df56571703b0..7bcfffe5dfd9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -567,5 +567,20 @@
clocks = <&ao_ctrl 2>;
clock-names = "apb_pclk";
};
+
+ spi0: spi@f7106000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x0 0xf7106000 0x0 0x1000>;
+ interrupts = <0 50 4>;
+ bus-id = <0>;
+ enable-dma = <0>;
+ clocks = <&sys_ctrl HI6220_SPI_CLK>;
+ clock-names = "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;
+ num-cs = <1>;
+ cs-gpios = <&gpio6 2 0>;
+ status = "disabled";
+ };
};
};