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authorLeo Yan <leo.yan@linaro.org>2016-03-29 19:27:15 +0800
committerWei Xu <xuwei5@hisilicon.com>2016-04-15 17:02:18 +0100
commitcd0b69ec0eb5e489954d7125b934457ac7acf6f7 (patch)
treecc1d31935730c8669e0c60acbceb56d98f87cdbe /arch/arm64/boot/dts/hisilicon/hi6220.dtsi
parent2158ab084b721da7b0e4963ac91fd96775b80916 (diff)
arm64: dts: register Hi6220's thermal zone for power allocator
With profiling Hi6220's power modeling so get dynamic coefficient and sustainable power. So pass these parameters from DT. Now enable power allocator with only one actor for CPU part, so directly use cluster0's thermal sensor for monitoring temperature. Reviewed-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hi6220.dtsi')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi6220.dtsi35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index fc61a164eceb..0c8df8a93dbe 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/hi6220-clock.h>
#include <dt-bindings/pinctrl/hisi.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "hisilicon,hi6220";
@@ -88,6 +89,7 @@
cooling-max-level = <0>;
#cooling-cells = <2>; /* min followed by max */
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ dynamic-power-coefficient = <311>;
};
cpu1: cpu@1 {
@@ -781,5 +783,38 @@
clock-names = "thermal_clk";
#thermal-sensor-cells = <1>;
};
+
+ thermal-zones {
+
+ cls0: cls0 {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <3326>;
+
+ /* sensor ID */
+ thermal-sensors = <&tsensor 2>;
+
+ trips {
+ threshold: trip-point@0 {
+ temperature = <65000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ target: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
};
};