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authorKefeng Wang <wangkefeng.wang@huawei.com>2016-08-15 15:03:41 +0800
committerWei Xu <xuwei5@hisilicon.com>2016-08-24 16:19:37 +0100
commitfb9b80b838fa91892ee2778afb363761a0ab5a8a (patch)
treed6c38eb780c7284077ce4e85cce0027425962826 /arch/arm64/boot/dts/hisilicon/hip05.dtsi
parent813a731522361467da9acabbb855c9a1cbbf5d5b (diff)
arm64: dts: hip05: kill hip05_hns.dtsi
The dsaf interrupt of hns connects to mbigen, but the mbigen(version 1) isn't upsteamed. Currently, hip05_hns.dtsi uses mbigen_dsa and it will never be built, so kill it for now, will add them back and merge them into hip05.dtsi once mbigen-v1 is accepted. Cc: Kejian Yan <yankejian@huawei.com> Cc: Yisen Zhuang <yisen.zhuang@huawei.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hip05.dtsi')
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip05.dtsi5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index bf322ed038b8..4b472a302cd8 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -300,11 +300,6 @@
clock-frequency = <200000000>;
};
- peri_c_subctrl: syscon@80000000 {
- compatible = "hisilicon,hip05-perisubc", "syscon";
- reg = < 0x0 0x80000000 0x0 0x10000>;
- };
-
uart0: uart@80300000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x80300000 0x0 0x10000>;