diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2019-02-28 21:15:10 +0530 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2019-04-08 15:49:25 +0100 |
| commit | 570274cdba34c01fb1e84db3648cb22b258cc394 (patch) | |
| tree | 3e7ce3d75f4ca26a9241d359d88cef052f5e1e41 /arch/arm64/boot/dts/hisilicon | |
| parent | 8aa576a8ee1ba1f76785ed3cd12de20121971854 (diff) | |
arm64: dts: hisilicon: hi3670: Add MMC controller support
Add MMC controller support for HiSilicon HI3670 SoC reusing the HI3660
Designware MMC driver. There are 2 DWMMC controllers present in this SoC:
1. DWMMC1 is used for SD card (SD)
2. DWMMC2 is used for WiFi (SDIO)
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon')
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index bc8363bc3b9c..30177543cc8f 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -654,5 +654,42 @@ clocks = <&sctrl HI3670_PCLK_AO_GPIO6>; clock-names = "apb_pclk"; }; + + /* SD */ + dwmmc1: dwmmc1@ff37f000 { + compatible = "hisilicon,hi3670-dw-mshc", + "hisilicon,hi3660-dw-mshc"; + reg = <0x0 0xff37f000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&crg_ctrl HI3670_CLK_GATE_SD>, + <&crg_ctrl HI3670_HCLK_GATE_SD>; + clock-names = "ciu", "biu"; + clock-frequency = <3200000>; + resets = <&crg_rst 0x94 18>; + reset-names = "reset"; + hisilicon,peripheral-syscon = <&sctrl>; + card-detect-delay = <200>; + status = "disabled"; + }; + + /* SDIO */ + dwmmc2: dwmmc2@fc183000 { + compatible = "hisilicon,hi3670-dw-mshc", + "hisilicon,hi3660-dw-mshc"; + reg = <0x0 0xfc183000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&crg_ctrl HI3670_CLK_GATE_SDIO>, + <&crg_ctrl HI3670_HCLK_GATE_SDIO>; + clock-names = "ciu", "biu"; + clock-frequency = <3200000>; + resets = <&crg_rst 0x94 20>; + reset-names = "reset"; + card-detect-delay = <200>; + status = "disabled"; + }; }; }; |