diff options
| author | Sean Wang <sean.wang@mediatek.com> | 2018-02-18 03:54:42 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2018-03-11 20:28:33 +0100 |
| commit | 13f36c326cef1aaf373b83f46df95fa42b70f426 (patch) | |
| tree | 070a8ce72e1237bd726b3ca70ad7d093b1dec995 /arch/arm64/boot/dts/mediatek | |
| parent | a5a80f78657f7d7b9b73bc67d0a18d5997c91168 (diff) | |
arm64: dts: mt7622: turn uart0 clock to real ones
This patch also cleans up two oscillators that provide clocks for MT7623.
Switch the uart clocks to the real ones while at it.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7622.dtsi | 15 |
1 files changed, 2 insertions, 13 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index b4e5d49f9193..10ad69c02da8 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -91,18 +91,6 @@ }; }; - uart_clk: dummy25m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - bus_clk: dummy280m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <280000000>; - }; - pwrap_clk: dummy40m { compatible = "fixed-clock"; clock-frequency = <40000000>; @@ -234,7 +222,8 @@ "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x400>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>; - clocks = <&uart_clk>, <&bus_clk>; + clocks = <&topckgen CLK_TOP_UART_SEL>, + <&pericfg CLK_PERI_UART1_PD>; clock-names = "baud", "bus"; status = "disabled"; }; |