diff options
author | Sean Wang <sean.wang@mediatek.com> | 2019-06-01 08:03:15 +0800 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2019-06-03 15:00:00 -0700 |
commit | afdede615094924aadbf2ba1a9ce21a2f9d78722 (patch) | |
tree | aab17b0a51de38493b84849ca22afbbe74698ca5 /arch/arm64/boot/dts/mediatek | |
parent | d438e29891cbdc153aa64cdedcb6e8ae8b6a606c (diff) |
arm64: dts: mt7622: Enlarge the SGMII register range
Enlarge the SGMII register range and using 2.5G force mode on default.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7622.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 4b1f5ae710eb..d1e13d340e26 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -929,7 +929,8 @@ sgmiisys: sgmiisys@1b128000 { compatible = "mediatek,mt7622-sgmiisys", "syscon"; - reg = <0 0x1b128000 0 0x1000>; + reg = <0 0x1b128000 0 0x3000>; #clock-cells = <1>; + mediatek,physpeed = "2500"; }; }; |