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authorAmit Kucheria <amit.kucheria@linaro.org>2019-05-21 15:05:14 +0530
committerAndy Gross <agross@kernel.org>2019-05-29 21:37:32 -0500
commit4c9e5dfb45e840f74e295242cdd12f7c33a6dd7f (patch)
treebd1d0ac8dfcc3ba3bfdc318b661f19b334411686 /arch/arm64/boot/dts/qcom/msm8916.dtsi
parent4742ab860618955aa3d601e678f71fc7fbbd8c6b (diff)
arm64: dts: qcom: msm8916: Use more generic idle state names
Instead of using Qualcomm-specific terminology, use generic node names for the idle states that are easier to understand. Move the description into the "idle-state-name" property. Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8916.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 0d6ba8b3fa0e..6f9bb14b10f7 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -110,7 +110,7 @@
reg = <0x0>;
next-level-cache = <&L2_0>;
enable-method = "psci";
- cpu-idle-states = <&CPU_SPC>;
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
@@ -122,7 +122,7 @@
reg = <0x1>;
next-level-cache = <&L2_0>;
enable-method = "psci";
- cpu-idle-states = <&CPU_SPC>;
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
@@ -134,7 +134,7 @@
reg = <0x2>;
next-level-cache = <&L2_0>;
enable-method = "psci";
- cpu-idle-states = <&CPU_SPC>;
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
@@ -146,7 +146,7 @@
reg = <0x3>;
next-level-cache = <&L2_0>;
enable-method = "psci";
- cpu-idle-states = <&CPU_SPC>;
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&apcs>;
operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>;
@@ -160,8 +160,9 @@
idle-states {
entry-method = "psci";
- CPU_SPC: spc {
+ CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
+ idle-state-name = "standalone-power-collapse";
arm,psci-suspend-param = <0x40000002>;
entry-latency-us = <130>;
exit-latency-us = <150>;