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| author | Arnd Bergmann <arnd@arndb.de> | 2018-03-27 14:30:49 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-27 14:30:49 +0200 |
| commit | 2430bcda3678dc031e442b700f8a694b093a9851 (patch) | |
| tree | d2cff42d200e8b87a2cf533b5fb92eefd8d1af99 /arch/arm64/boot/dts/qcom/msm8996.dtsi | |
| parent | b6f67b039c64572adced5d5c0f01dc944e251bc2 (diff) | |
| parent | e723795c702b52cfceb3bb3faa63059eb4658313 (diff) | |
Merge tag 'qcom-arm64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm ARM64 Updates for v4.17" from Andy Gross:
* Fix GIC_CPU_MASK_SIMPLE and SPI5 config on MSM8996
* Add SDM845 and kryo385 documentation
* Add MSM8916 cooling maps, cpu frequency scaling, APCS, and A53 PLL
* Switch APCS to use mailbox on MSM8916
* Add rmtfs-mem on MSM8996
* tag 'qcom-arm64-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: qcom: Fix SPI5 config on MSM8996
dt-bindings: qcom: Add SDM845 bindings
dt-bindings: arm: Document kryo385 cpu
arm64: dts: msm8916: Add cpu cooling maps
arm64: dts: msm8996: Add rmtfs sharedmem node
arm64: dts: qcom: msm8916: Add CPU frequency scaling support
arm64: dts: qcom: msm8916: Add clock properties to the APCS node
arm64: dts: qcom: msm8916: Probe the APCS mailbox driver
arm64: dts: qcom: msm8916: Add msm8916 A53 PLL DT node
arm64: dts: msm8996: Fix wrong use of GIC_CPU_MASK_SIMPLE()
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 0a6f7952bbb1..410ae787ebb4 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -75,6 +75,17 @@ reg = <0x0 0x86200000 0x0 0x2600000>; no-map; }; + + rmtfs@86700000 { + compatible = "qcom,rmtfs-mem"; + + size = <0x0 0x200000>; + alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <15>; + }; }; cpus { @@ -232,10 +243,10 @@ timer { compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; }; clocks { @@ -497,8 +508,8 @@ blsp2_spi5: spi@75ba000{ compatible = "qcom,spi-qup-v2.2.1"; reg = <0x075ba000 0x600>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP2_QUP5_SPI_APPS_CLK>, + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_BLSP2_QUP6_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clock-names = "core", "iface"; pinctrl-names = "default", "sleep"; |