diff options
| author | Evan Green <evgreen@chromium.org> | 2019-03-21 10:17:57 -0700 |
|---|---|---|
| committer | Andy Gross <agross@kernel.org> | 2019-05-29 21:31:08 -0500 |
| commit | 3a2b37b09f74c0bc1d8745e1f9c5985d4bccb78f (patch) | |
| tree | 7e699a8a6e8ff2d09c94afcfa979044abb4b9e28 /arch/arm64/boot/dts/qcom/msm8996.dtsi | |
| parent | a188339ca5a396acc588e5851ed7e19f66b0ebd9 (diff) | |
arm64: dts: msm8996: Add UFS PHY reset controller
Add the reset controller for the UFS controller, and wire it up
so that the UFS PHY can initialize itself without relying on
implicit sequencing between the two drivers.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c4e7fde9d88e..0f234bef90ee 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -854,10 +854,11 @@ clock-names = "ref_clk_src", "ref_clk"; clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_UFS_CLKREF_CLK>; + resets = <&ufshc 0>; status = "disabled"; }; - ufshc@624000 { + ufshc: ufshc@624000 { compatible = "qcom,ufshc"; reg = <0x624000 0x2500>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; @@ -913,6 +914,7 @@ <0 0>; lanes-per-direction = <1>; + #reset-cells = <1>; status = "disabled"; ufs_variant { |