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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-06-17 16:14:11 +0100
committerAndy Gross <andy.gross@linaro.org>2016-06-24 22:30:17 -0500
commitdb6c8c83252659e42bb3881521d8bc8607dd7a09 (patch)
tree9ef8fa5a952baab577836ba26fd9ac0024520878 /arch/arm64/boot/dts/qcom
parent7dba64a23e29b8afa7525bdda4e6929d4a7ff629 (diff)
arm64: dts: msm8996: add support to blsp2_spi5
This patch adds support to blsp2_spi5 device, which is used in some of the APQ8096 based boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8996.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index e0090636491d..f68b078b1cb9 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -231,6 +231,21 @@
status = "disabled";
};
+ blsp2_spi5: spi@075ba000{
+ compatible = "qcom,spi-qup-v2.2.1";
+ reg = <0x075ba000 0x600>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP2_QUP5_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP2_AHB_CLK>;
+ clock-names = "core", "iface";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&blsp2_spi5_default>;
+ pinctrl-1 = <&blsp2_spi5_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
msmgpio: pinctrl@1010000 {
compatible = "qcom,msm8996-pinctrl";
reg = <0x01010000 0x300000>;