summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
diff options
context:
space:
mode:
authorVladimir Barinov <vladimir.barinov@cogentembedded.com>2017-10-06 05:43:59 +0300
committerSimon Horman <horms+renesas@verge.net.au>2017-10-10 09:51:21 +0200
commite0304a365bf07b4a0bb2d56ece5b52f3347d5a01 (patch)
treef385f97f26d766fba909ed5c033f5effaf125776 /arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
parent36bd8e3e34f2cd0b9a074df22327719d8d34b3a5 (diff)
arm64: dts: ulcb-kf: enable PCIE0/1
This supports PCIE0/1 on ULCB Kingfisher board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/ulcb-kf.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/ulcb-kf.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
index 83284eace174..ae970da51fa1 100644
--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
@@ -48,6 +48,18 @@
status = "okay";
};
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pciec0 {
+ status = "okay";
+};
+
+&pciec1 {
+ status = "okay";
+};
+
&pfc {
can0_pins: can0 {
groups = "can0_data_a";