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authorViresh Kumar <viresh.kumar@linaro.org>2018-05-25 11:10:05 +0530
committerHeiko Stuebner <heiko@sntech.de>2018-06-20 01:15:55 +0200
commitcc9b0918037454d2cd9f6f07d95095fe30b02091 (patch)
tree7897ae71ab339b917ac1c92c5d1b4185e756a15a /arch/arm64/boot/dts/rockchip/rk3328.dtsi
parentea41d63b544062489b3f2af2aab4eefee45aef31 (diff)
arm64: dts: rockchip: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3328.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 241b86513c1b..2f38ff2f1465 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -52,6 +52,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
clocks = <&cru ARMCLK>;
+ #cooling-cells = <2>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -63,6 +64,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
clocks = <&cru ARMCLK>;
+ #cooling-cells = <2>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -74,6 +76,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
clocks = <&cru ARMCLK>;
+ #cooling-cells = <2>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;