diff options
| author | Chris Zhong <zyw@rock-chips.com> | 2016-09-07 16:06:17 -0700 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-10-16 02:42:59 +0200 |
| commit | 06ad4b2fad80713c50a31da6d1048cb1df728558 (patch) | |
| tree | bb6ac258b4c80dec3d27fa187c3a609ba05ec876 /arch/arm64/boot/dts/rockchip/rk3399.dtsi | |
| parent | 2c60dc4342f1d95859232d4cd5f77011fc395b31 (diff) | |
arm64: dts: rockchip: add powerdomain for typec on rk3399
The tcpc power domain will try to power up/down the power of Type-C PHY.
Hence, we need control it in Type-C PHY driver with the pm_runtime helper.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index b65c193dc64e..76b28649f0b0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1148,6 +1148,7 @@ clock-names = "tcpdcore", "tcpdphy-ref"; assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>; assigned-clock-rates = <50000000>; + power-domains = <&power RK3399_PD_TCPD0>; resets = <&cru SRST_UPHY0>, <&cru SRST_UPHY0_PIPE_L00>, <&cru SRST_P_UPHY0_TCPHY>; @@ -1176,6 +1177,7 @@ clock-names = "tcpdcore", "tcpdphy-ref"; assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>; assigned-clock-rates = <50000000>; + power-domains = <&power RK3399_PD_TCPD1>; resets = <&cru SRST_UPHY1>, <&cru SRST_UPHY1_PIPE_L00>, <&cru SRST_P_UPHY1_TCPHY>; |