diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2018-08-02 13:35:37 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2018-09-24 15:46:24 +0200 |
| commit | bb5981333f302f81fe520ca2b5f30f73f6bdaff1 (patch) | |
| tree | e9d19d732ab0c45d5459070b1892251c6d158b15 /arch/arm64/boot/dts/rockchip | |
| parent | 6c78ca379c2edfe71c97c1abbb2716298263b9c7 (diff) | |
arm64: dts: rockchip: add dwc2 otg controller on px30
Add the node for the dwc2-based otg controller on the px30 soc.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index fa82dd80c801..9aa8d5ef9e45 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -703,6 +703,22 @@ <100000000>, <200000000>; }; + usb20_otg: usb@ff300000 { + compatible = "rockchip,px30-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0x0 0xff300000 0x0 0x40000>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_OTG>; + clock-names = "otg"; + dr_mode = "otg"; + g-np-tx-fifo-size = <16>; + g-rx-fifo-size = <280>; + g-tx-fifo-size = <256 128 128 64 32 16>; + g-use-dma; + power-domains = <&power PX30_PD_USB>; + status = "disabled"; + }; + usb_host0_ehci: usb@ff340000 { compatible = "generic-ehci"; reg = <0x0 0xff340000 0x0 0x10000>; |