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authorTony Lindgren <tony@atomide.com>2023-06-14 11:01:53 +0530
committerPraneeth Bajjuri <praneeth@ti.com>2023-06-14 13:39:41 -0500
commite3b3b641f0a2145786fbb52d8ebc57c4cb2bfa8b (patch)
tree20b30bace4e476b862954157b54376fa7f8e6124 /arch/arm64/boot/dts/ti/k3-am62-main.dtsi
parentecb42e33384819104b761d364d029a89e78c557f (diff)
HACK: arm64: dts: ti: Configure am62 pinctrl-single for wake-up interrupts
Configure am62 pinctrl-single for wake-up interrupts. Eventually we may want to set up a chained interrupt handler in the ti-msgmgr for pinctrl-single to use. Marked as HACK because physically none of the wakeup source events are connected to GIC. [d-gole@ti.com] change to use the GIC_SPI 98 instead of 34. The logic is such that in DT we specify x+32 for configuring intr source gicss0.spi.x In this case the input index is gicss0.spi.66 so interrupt source will be dmss0.intaggr_vintr.2 Co-developed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-am62-main.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-am62-main.dtsi5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index b4051afb0a4e..489857bbb3f9 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -190,11 +190,14 @@
};
main_pmx0: pinctrl@f4000 {
- compatible = "pinctrl-single";
+ compatible = "ti,am6-padconf";
reg = <0x00 0xf4000 0x00 0x2ac>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
};
main_uart0: serial@2800000 {