diff options
| author | Hiago De Franco <hiago.franco@toradex.com> | 2023-06-16 14:30:23 +0200 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2023-07-25 11:57:50 +0200 |
| commit | 8812b0f9825cac9cf7cbb8f2a5ab9f383831659f (patch) | |
| tree | ddce906839893b0858df1adca7c8810e22927263 /arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | |
| parent | 133dc46ce121b23c63c45a1b08e0a4ff7dd74af1 (diff) | |
arm64: dts: ti: k3-am625-verdin: enable CAN_2
Add Verdin CAN_2 (TI AM62 MCU_MCAN0) and enable it on the Yavia,
Dahlia and Verdin Development board.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Upstream-Status: Submitted [https://lore.kernel.org/all/20230724133612.37366-1-francesco@dolcini.it/]
Kept the node name pattern for the pinctrl even if it does not match
the downstream pattern used in the file.
Compare with commit a495681151434 ("arm64: dts: ti: Unify pin group
node names for make dtbs checks")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi index 432968bd7ec3..27892ec988d1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi @@ -19,6 +19,8 @@ }; aliases { + can0 = &main_mcan0; + can1 = &mcu_mcan0; ethernet0 = &cpsw_port1; ethernet1 = &cpsw_port2; i2c0 = &main_i2c0; @@ -732,6 +734,14 @@ >; }; + /* Verdin CAN_2 */ + pinctrl_mcu_mcan0: mcu-mcan0-default-pins { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */ + AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */ + >; + }; + /* Verdin UART_4 - Reserved to Cortex-M4 */ pinctrl_mcu_uart0: mcu-uart0-pins-default { pinctrl-single,pins = < @@ -1238,8 +1248,6 @@ status = "disabled"; }; -/* Verdin CAN_2 - Reserved to Cortex-M4 */ - /* Verdin SPI_1 */ &main_spi1 { pinctrl-names = "default"; @@ -1333,6 +1341,13 @@ ""; }; +/* Verdin CAN_2 */ +&mcu_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mcan0>; + status = "disabled"; +}; + /* Verdin UART_4 - Cortex-M4 UART */ &mcu_uart0 { pinctrl-names = "default"; |