diff options
author | Richard Zhu <hongxing.zhu@nxp.com> | 2017-11-17 14:32:23 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:29:18 +0800 |
commit | 2304bca4a95f158a8822da96de2641cd35a4fe86 (patch) | |
tree | 3b65894e57fb3c5e18a3ad0de5280ae416b1ad64 /arch/arm64/boot | |
parent | 222fab6f46b37d70c7748a4d82808d56a0dba6b0 (diff) |
MLK-16818-1 ARM64: dts: imx8: modify the dts to enable ep rc support
- Correct the comments of iMX8QM PCIEB
- Enlarge the CFG space of iMX8QXP PCIEB.
- PCIE port maybe hard-wired in the hardware design.
Use the hard-wired property to specify it on iMX8MQ.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 2 |
3 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts index fcc0bf14ba9c..82e674cf9a96 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts @@ -472,6 +472,8 @@ clkreq-gpio = <&gpio5 20 GPIO_ACTIVE_LOW>; disable-gpio = <&gpio5 29 GPIO_ACTIVE_LOW>; reset-gpio = <&gpio5 28 GPIO_ACTIVE_LOW>; + ext_osc = <1>; + hard-wired = <1>; status = "okay"; }; @@ -481,6 +483,7 @@ clkreq-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>; disable-gpio = <&gpio5 10 GPIO_ACTIVE_LOW>; reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>; + ext_osc = <1>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 91b492671e2f..e10b43c7ac62 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -3019,7 +3019,7 @@ fsl,max-link-speed = <3>; hsio-cfg = <PCIEAX1PCIEBX1SATA>; hsio = <&hsio>; - ctrl-id = <1>; /* pciea */ + ctrl-id = <1>; /* pcieb */ cpu-base-addr = <0x80000000>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index 4ec70d5bd583..8872d3d3273a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -2240,7 +2240,7 @@ */ compatible = "fsl,imx8qxp-pcie","snps,dw-pcie"; reg = <0x0 0x5f010000 0x0 0x10000>, /* Controller reg*/ - <0x0 0x7ff00000 0x0 0x10000>; /* PCI cfg space */ + <0x0 0x7ff00000 0x0 0x80000>; /* PCI cfg space */ reg-names = "dbi", "config"; #address-cells = <3>; #size-cells = <2>; |