diff options
author | Andy Duan <fugang.duan@nxp.com> | 2018-06-05 18:07:29 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:03 +0800 |
commit | e44592d26701fb5e76921cae99d37897146cf8ff (patch) | |
tree | a8a43bca1ef5c6f626110da4b4ef34df6d02ab25 /arch/arm64/boot | |
parent | 379ede4dfd95bb669dc9b1e1e539f35f0e95b46b (diff) |
MLK-18483-03 ARM64: dts: imx8qm/qxp: add enet sleep mode support
Add enet sleep mode support for imx8qm/qxp platforms.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 6 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-xen.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 6 |
3 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index cea8956784ac..828bc2ee1f10 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -381,11 +381,13 @@ reg = <SC_R_ENET_0>; #power-domain-cells = <0>; power-domains = <&pd_conn>; + wakeup-irq = <258>; }; pd_conn_enet1: PD_CONN_ENET_1 { reg = <SC_R_ENET_1>; #power-domain-cells = <0>; power-domains = <&pd_conn>; + fsl,wakeup_irq = <262>; }; pd_conn_nand: PD_CONN_NAND { reg = <SC_R_NAND>; @@ -3411,6 +3413,7 @@ fec1: ethernet@5b040000 { compatible = "fsl,imx8qm-fec"; reg = <0x0 0x5b040000 0x0 0x10000>; + interrupt-parent = <&wu>; interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, @@ -3423,6 +3426,7 @@ assigned-clock-rates = <250000000>, <125000000>; fsl,num-tx-queues=<3>; fsl,num-rx-queues=<3>; + fsl,wakeup_irq = <0>; power-domains = <&pd_conn_enet0>; iommus = <&smmu 0x12 0x7f80>; status = "disabled"; @@ -3431,6 +3435,7 @@ fec2: ethernet@5b050000 { compatible = "fsl,imx8qm-fec"; reg = <0x0 0x5b050000 0x0 0x10000>; + interrupt-parent = <&wu>; interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, @@ -3443,6 +3448,7 @@ assigned-clock-rates = <250000000>, <125000000>; fsl,num-tx-queues=<3>; fsl,num-rx-queues=<3>; + fsl,wakeup_irq = <0>; power-domains = <&pd_conn_enet1>; iommus = <&smmu 0x12 0x7f80>; status = "disabled"; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-xen.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-xen.dtsi index 64ee1cd8fa7c..b4da96aedee2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-xen.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-xen.dtsi @@ -159,10 +159,12 @@ }; &fec1 { + interrupt-parent = <&gic>; /delete-property/ iommus; }; &fec2 { + interrupt-parent = <&gic>; /delete-property/ iommus; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index 674fa6a0c37c..a3cb4d60c515 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -379,11 +379,13 @@ reg = <SC_R_ENET_0>; #power-domain-cells = <0>; power-domains = <&pd_conn>; + wakeup-irq = <258>; }; pd_conn_enet1: PD_CONN_ENET_1 { reg = <SC_R_ENET_1>; #power-domain-cells = <0>; power-domains = <&pd_conn>; + fsl,wakeup_irq = <262>; }; pd_conn_nand: PD_CONN_NAND { reg = <SC_R_NAND>; @@ -2907,6 +2909,7 @@ fec1: ethernet@5b040000 { compatible = "fsl,imx8qm-fec"; reg = <0x0 0x5b040000 0x0 0x10000>; + interrupt-parent = <&wu>; interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, @@ -2919,6 +2922,7 @@ assigned-clock-rates = <250000000>, <125000000>; fsl,num-tx-queues=<3>; fsl,num-rx-queues=<3>; + fsl,wakeup_irq = <0>; power-domains = <&pd_conn_enet0>; status = "disabled"; }; @@ -2926,6 +2930,7 @@ fec2: ethernet@5b050000 { compatible = "fsl,imx8qm-fec"; reg = <0x0 0x5b050000 0x0 0x10000>; + interrupt-parent = <&wu>; interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, @@ -2938,6 +2943,7 @@ assigned-clock-rates = <250000000>, <125000000>; fsl,num-tx-queues=<3>; fsl,num-rx-queues=<3>; + fsl,wakeup_irq = <0>; power-domains = <&pd_conn_enet1>; status = "disabled"; }; |