diff options
author | Daniel Baluta <daniel.baluta@nxp.com> | 2018-10-05 16:47:36 +0300 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:33 +0800 |
commit | 9eab7ec6e9ab0f52485f808717fe937185260298 (patch) | |
tree | 9d14a415647ee6a771e569b031fc4ef9485fbb3d /arch/arm64/boot | |
parent | 9471a9db22a473b475de7f02e8b764f4f5343bc7 (diff) |
MLK-18497-13: arm64: dts: Enable DSP with cs42888 codec on imx8qxp arm2
This allows us to decode and render frames using ESAI Digital
Audio interface and cs4228 codec.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/freescale/Makefile | 1 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-dsp.dts | 84 |
3 files changed, 88 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 43e10f13a02a..84e7c0f39a1c 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_FSL_IMX8QXP) += fsl-imx8qxp-lpddr4-arm2.dtb \ fsl-imx8qxp-lpddr4-arm2-mlb.dtb \ fsl-imx8qxp-lpddr4-arm2-mqs.dtb \ fsl-imx8qxp-lpddr4-arm2-wm8962.dtb \ + fsl-imx8qxp-lpddr4-arm2-dsp.dtb \ fsl-imx8qxp-lpddr4-arm2-dsi-rm67191.dtb \ fsl-imx8qxp-lpddr4-arm2-a0.dtb \ fsl-imx8qxp-ddr3l-val.dtb \ diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi index e8ba57f566dd..4c99c9deadd7 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi @@ -3117,6 +3117,9 @@ <&clk IMX8QXP_AUD_DSP_CORE_CLK>; clock-names = "ipg", "ocram", "core"; fsl,dsp-firmware = "imx/dsp/hifi4.bin"; + fsl,dsp-wrap = "imx/dsp/lib_dsp_codec_wrap.so"; + fsl,dsp-codec-mp3 = "imx/dsp/lib_dsp_mp3_dec.so"; + fsl,dsp-codec-aac = "imx/dsp/lib_dsp_aac_dec.so"; power-domains = <&pd_dsp>; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-dsp.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-dsp.dts new file mode 100644 index 000000000000..1c19b075db4e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-dsp.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ +// Copyright 2017 NXP + +#include "fsl-imx8qxp-lpddr4-arm2.dts" + +/ { + sound-cs42888 { + status = "disabled"; + }; + + dspaudio: dspaudio { + compatible = "fsl,dsp-audio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esai0>; + clocks = <&clk IMX8QXP_AUD_ESAI_0_IPG>, + <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>; + clock-names = "bus", "mclk"; + assigned-clocks = <&clk IMX8QXP_ACM_ESAI0_MCLK_SEL>, + <&clk IMX8QXP_AUD_PLL0_DIV>, + <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>, + <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>, + <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>; + assigned-clock-parents = <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <24576000>, <49152000>; + power-domains = <&pd_esai0>; + status = "okay"; + }; + + sound-dsp { + compatible = "fsl,imx-dsp-audio"; + model = "dsp-audio"; + cpu-dai = <&dspaudio>; + audio-codec = <&codec>; + audio-platform = <&dsp>; + }; +}; + +&edma0 { + compatible = "fsl,imx8qm-edma"; + reg = <0x0 0x59200000 0x0 0x10000>, /* asrc0 */ + <0x0 0x59210000 0x0 0x10000>, + <0x0 0x59220000 0x0 0x10000>, + <0x0 0x59230000 0x0 0x10000>, + <0x0 0x59240000 0x0 0x10000>, + <0x0 0x59250000 0x0 0x10000>, + <0x0 0x59280000 0x0 0x10000>, /* spdif0 rx */ + <0x0 0x59290000 0x0 0x10000>, /* spdif0 tx */ + <0x0 0x592c0000 0x0 0x10000>, /* sai0 rx */ + <0x0 0x592d0000 0x0 0x10000>, /* sai0 tx */ + <0x0 0x592e0000 0x0 0x10000>, /* sai1 rx */ + <0x0 0x592f0000 0x0 0x10000>, /* sai1 tx */ + <0x0 0x59350000 0x0 0x10000>, + <0x0 0x59370000 0x0 0x10000>; + #dma-cells = <3>; + shared-interrupt; + dma-channels = <14>; + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc 0 */ + <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, /* spdif0 */ + <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, /* sai0 */ + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, /* sai1 */ + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "edma0-chan0-rx", "edma0-chan1-rx", /* asrc0 */ + "edma0-chan2-rx", "edma0-chan3-tx", + "edma0-chan4-tx", "edma0-chan5-tx", + "edma0-chan8-rx", "edma0-chan9-tx", /* spdif0 */ + "edma0-chan12-rx", "edma0-chan13-tx", /* sai0 */ + "edma0-chan14-rx", "edma0-chan15-tx", /* sai1 */ + "edma0-chan21-tx", /* gpt5 */ + "edma0-chan23-rx"; /* gpt7 */ + status = "okay"; +}; + +&esai0 { + status = "disabled"; +}; |