diff options
author | Guoniu.zhou <guoniu.zhou@nxp.com> | 2019-05-05 17:58:16 +0800 |
---|---|---|
committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:29 +0800 |
commit | e03d22695cdcd6ee2c2d3fc1373bb695f84835cc (patch) | |
tree | f30bda04db106331b63bd5508331f572dc543bbb /arch/arm64/boot | |
parent | b9e94664916f6640191302adad97bf20f91afa19 (diff) |
arm64: dts: add dts for GMSL MAX9286 device node
GMSL MAX9286 is a quad 1.5Gbps GMSL Deserializer with Coax
or STP Input and CSI-2 Output. IMX8QM support two max9286
and IMX8QXP only support one.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
[ Aisheng: fix small conflicts during upgrade ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r-- | arch/arm64/boot/dts/freescale/Makefile | 4 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qm-mek-max9286.dts | 110 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp-mek-max9286.dts | 60 |
3 files changed, 172 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index e8439c53ec78..ec8a0df500c4 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -30,6 +30,6 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb -dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb imx8qm-mek-max9286.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb -dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb imx8qxp-mek-dsp.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb imx8qxp-mek-dsp.dtb imx8qxp-mek-max9286.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek-max9286.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek-max9286.dts new file mode 100644 index 000000000000..4de1c2727b54 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek-max9286.dts @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright NXP 2019 + +#include "imx8qm-mek.dts" + +&isi_0 { + status = "okay"; +}; + +&isi_1 { + status = "okay"; +}; + +&isi_2 { + status = "okay"; +}; + +&isi_3 { + status = "okay"; +}; + +&isi_4 { + status = "okay"; +}; + +&isi_5 { + status = "okay"; +}; + +&isi_6 { + status = "okay"; +}; + +&isi_7 { + status = "okay"; +}; + +&mipi_csi_0 { + virtual-channel; + + /* Camera 0 MIPI CSI-2 (CSIS0) */ + port@0 { + reg = <0>; + mipi_csi0_ep: endpoint { + remote-endpoint = <&max9286_0_ep>; + data-lanes = <1 2 3 4>; + }; + }; +}; + +&mipi_csi_1 { + virtual-channel; + + /* Camera 0 MIPI CSI-2 (CSIS0) */ + port@1 { + reg = <1>; + mipi_csi1_ep: endpoint { + remote-endpoint = <&max9286_1_ep>; + data-lanes = <1 2 3 4>; + }; + }; +}; + +&i2c_mipi_csi0 { + max9286_mipi@6a { + compatible = "maxim,max9286_mipi"; + reg = <0x6a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mipi_csi0>; + clocks = <&clk IMX_CLK_DUMMY>; + clock-names = "capture_mclk"; + mclk = <27000000>; + mclk_source = <0>; + pwn-gpios = <&lsio_gpio1 27 GPIO_ACTIVE_HIGH>; + virtual-channel; + status = "okay"; + port { + max9286_0_ep: endpoint { + remote-endpoint = <&mipi_csi0_ep>; + data-lanes = <1 2 3 4>; + }; + }; + }; + + /delete-node/ov5640_mipi@3c; +}; + +&i2c_mipi_csi1 { + max9286_mipi@6a { + compatible = "maxim,max9286_mipi"; + reg = <0x6a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mipi_csi1>; + clocks = <&clk IMX_CLK_DUMMY>; + clock-names = "capture_mclk"; + mclk = <27000000>; + mclk_source = <0>; + pwn-gpios = <&lsio_gpio1 30 GPIO_ACTIVE_HIGH>; + virtual-channel; + status = "okay"; + port { + max9286_1_ep: endpoint { + remote-endpoint = <&mipi_csi1_ep>; + data-lanes = <1 2 3 4>; + }; + }; + }; + + /delete-node/ov5640_mipi@3c; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-max9286.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek-max9286.dts new file mode 100644 index 000000000000..891d8f03fade --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek-max9286.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright NXP 2019 + +#include "imx8qxp-mek.dts" + +&isi_0 { + status = "okay"; +}; + +&isi_1 { + status = "okay"; +}; + +&isi_2 { + status = "okay"; +}; + +&isi_3 { + status = "okay"; +}; + +&mipi_csi_0 { + #address-cells = <1>; + #size-cells = <0>; + virtual-channel; + status = "okay"; + + /* Camera 0 MIPI CSI-2 (CSIS0) */ + port@0 { + reg = <0>; + mipi_csi0_ep: endpoint { + remote-endpoint = <&max9286_0_ep>; + data-lanes = <1 2 3 4>; + }; + }; +}; + +&i2c_mipi_csi0 { + max9286_mipi@6a { + compatible = "maxim,max9286_mipi"; + reg = <0x6a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mipi_csi0>; + clocks = <&clk IMX_CLK_DUMMY>; + clock-names = "capture_mclk"; + mclk = <27000000>; + mclk_source = <0>; + pwn-gpios = <&lsio_gpio3 7 GPIO_ACTIVE_HIGH>; + virtual-channel; + status = "okay"; + port { + max9286_0_ep: endpoint { + remote-endpoint = <&mipi_csi0_ep>; + data-lanes = <1 2 3 4>; + }; + }; + }; + + /delete-node/ov5640_mipi@3c; +}; |