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author | Will Deacon <will.deacon@arm.com> | 2015-07-27 14:11:55 +0100 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2015-07-27 15:28:54 +0100 |
commit | c739dc83a0b6db01abfbcc5246a30c7a575e4272 (patch) | |
tree | 4c054765573ba9f95b330ed28c15278295947de6 /arch/arm64/include/asm/cpufeature.h | |
parent | 95eff6b27c40c7205f72f354712c3687d808e7f6 (diff) |
arm64: lse: rename ARM64_CPU_FEAT_LSE_ATOMICS for consistency
Other CPU features follow an 'ARM64_HAS_*' naming scheme, so do the same
for the LSE atomics.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cpufeature.h')
-rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index d9262d4b4dcd..171570702bb8 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -26,7 +26,7 @@ #define ARM64_WORKAROUND_845719 2 #define ARM64_HAS_SYSREG_GIC_CPUIF 3 #define ARM64_HAS_PAN 4 -#define ARM64_CPU_FEAT_LSE_ATOMICS 5 +#define ARM64_HAS_LSE_ATOMICS 5 #define ARM64_NCAPS 6 |