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authorAndi Kleen <ak@linux.intel.com>2015-03-09 11:20:22 -0700
committerIngo Molnar <mingo@kernel.org>2015-04-02 17:07:43 +0200
commitc420f19b9cdc59662dbb56677417487efc1729ec (patch)
tree4b043401d2146c2055d393ece7d57ce0a6350928 /arch/arm64/kernel/hw_breakpoint.c
parent687805e4a60fe83a11556c041840161f8016a367 (diff)
perf/x86/intel: Fix Haswell CYCLE_ACTIVITY.* counter constraints
Some of the CYCLE_ACTIVITY.* events can only be scheduled on counter 2. Due to a typo Haswell matched those with INTEL_EVENT_CONSTRAINT, which lead to the events never matching as the comparison does not expect anything in the umask too. Fix the typo. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: http://lkml.kernel.org/r/1425925222-32361-1-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm64/kernel/hw_breakpoint.c')
0 files changed, 0 insertions, 0 deletions