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| author | Marc Zyngier <marc.zyngier@arm.com> | 2019-01-18 14:08:59 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-02-06 19:43:05 +0100 |
| commit | 1b284d784624dbe747f24936b7b3e29e5eaffabc (patch) | |
| tree | 33f61a908ef072f038654d423c596b367fc56355 /arch/arm64/mm/flush.c | |
| parent | 2cbf0a6c9a6267aeb9d5ddf95a2e2222c41a1343 (diff) | |
irqchip/gic-v3-its: Align PCI Multi-MSI allocation on their size
commit 8208d1708b88b412ca97f50a6d951242c88cbbac upstream.
The way we allocate events works fine in most cases, except
when multiple PCI devices share an ITS-visible DevID, and that
one of them is trying to use MultiMSI allocation.
In that case, our allocation is not guaranteed to be zero-based
anymore, and we have to make sure we allocate it on a boundary
that is compatible with the PCI Multi-MSI constraints.
Fix this by allocating the full region upfront instead of iterating
over the number of MSIs. MSI-X are always allocated one by one,
so this shouldn't change anything on that front.
Fixes: b48ac83d6bbc2 ("irqchip: GICv3: ITS: MSI support")
Cc: stable@vger.kernel.org
Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
[ardb: rebased onto v4.9.153, should apply cleanly onto v4.4.y as well]
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'arch/arm64/mm/flush.c')
0 files changed, 0 insertions, 0 deletions