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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2019-04-23 16:54:18 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2019-04-24 13:56:38 +0200
commit8c1a280efd597920aba29434abd841723bed8cfc (patch)
treec26bec815c9a017568ff89db3a6e235279b3f5b4 /arch/arm64
parentc97298b6d6390da9d8b9be68e65191332760d7e0 (diff)
ARM: dts: imx8: apalis-imx8qm: use regular ddc i2c bus
The Apalis iMX8 design does not make use of the dedicated HDMI DDC/EDID pins aka HDMI_TX0_DDC_SCL/SDA being under exclusive HDMI transmitter firmware control but rather uses HDMI_TX0_TS_SCL/SDA. This patch enables using them as a regular DDC I2C bus. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
index 6ff0dcd845cd..bc384ca1da9c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts
@@ -826,8 +826,8 @@
assigned-clock-parents = <&clk IMX8QM_HDMI_AV_PLL_CLK>,
<&clk IMX8QM_HDMI_AV_PLL_CLK>,
<&clk IMX8QM_HDMI_AV_PLL_CLK>;
+ ddc-i2c-bus = <&i2c0>;
fsl,cec;
- fsl,no_edid;
hdmi-ctrl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
status = "okay";
};