diff options
author | Li Jun <jun.li@nxp.com> | 2018-05-14 09:40:56 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:31:45 +0800 |
commit | 596e32c3d2f15c7550166ad80924670d8432bac1 (patch) | |
tree | 83d5586265335e0027685a3058431d3e2afda920 /arch/arm64 | |
parent | f0d900494bfec752c9eae571b1555ee26fe99263 (diff) |
MLK-18296 arm64: dts: imx8mm-evk: enable usbotg1
Enable usbotg1 and disable usbotg2, both are USB 2.0 and dual role
capable, but the typec port for usbotg2 is primary for power, and
the dead battery is not ready, so disable the typec2 and usbotg2.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Diffstat (limited to 'arch/arm64')
-rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts index a9726e2f9c18..112f113ad465 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts @@ -111,6 +111,18 @@ >; }; + pinctrl_typec1: typec1grp { + fsl,pins = < + MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159 + >; + }; + + pinctrl_typec2: typec2grp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x159 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 @@ -435,6 +447,44 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + + typec1_ptn5110: tcpci@50 { + compatible = "usb,tcpci"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_typec1>; + reg = <0x50>; + interrupt-parent = <&gpio2>; + interrupts = <11 8>; + src-pdos = <0x380190c8>; + snk-pdos = <0x380190c8>; + /* Only can sink 5V for safe */ + max-snk-mv = <5000>; + max-snk-ma = <3000>; + op-snk-mw = <10000>; + max-snk-mw = <15000>; + port-type = "drp"; + default-role = "sink"; + status = "okay"; + }; + + typec2_ptn5110: tcpci@52 { + compatible = "usb,tcpci"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_typec2>; + reg = <0x52>; + interrupt-parent = <&gpio2>; + interrupts = <12 8>; + src-pdos = <0x380190c8>; + snk-pdos = <0x380190c8>; + /* Only can sink 5V for safe */ + max-snk-mv = <5000>; + max-snk-ma = <3000>; + op-snk-mw = <10000>; + max-snk-mw = <15000>; + port-type = "drp"; + default-role = "sink"; + status = "disabled"; + }; }; &i2c3 { @@ -489,6 +539,18 @@ status = "okay"; }; +&usbotg1 { + dr_mode = "otg"; + extcon = <0>, <&typec1_ptn5110>; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "otg"; + extcon = <0>, <&typec2_ptn5110>; + status = "disabled"; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; |