diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2019-09-04 15:33:26 -0400 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:07:15 +0800 |
| commit | 4e11bcca0e00059bb35ee5087e49bfbb8dbe5a8c (patch) | |
| tree | 9cde983b03f813f1bc2ea0aa48ed374561d5a458 /arch/arm64 | |
| parent | 009f3dbd0b6223b88917af974357d9249c8fcec8 (diff) | |
arm64: dts: enable imx8 pcie pm support
Enable the iMX8 PCIe PM supports.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'arch/arm64')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 8 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi | 2 | ||||
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 1 |
3 files changed, 1 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index c188016627a8..672ffd2b703c 100755 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -588,7 +588,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pciea>; reset-gpio = <&lsio_gpio4 29 GPIO_ACTIVE_LOW>; - clkreq-gpio = <&lsio_gpio4 27 GPIO_ACTIVE_LOW>; ext_osc = <1>; status = "okay"; }; @@ -614,12 +613,6 @@ }; &sata { - /* enable the clkreq-gpio if pcie is not enabled */ - /* - * pinctrl-names = "default"; - * pinctrl-0 = <&pinctrl_pciea>; - * clkreq-gpio = <&lsio_gpio4 27 GPIO_ACTIVE_LOW>; - */ ext_osc = <1>; status = "okay"; }; @@ -1060,7 +1053,6 @@ pinctrl_pciea: pcieagrp{ fsl,pins = < - IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x06000021 IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021 IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x06000021 >; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi index 41ad18166653..4cd5a17e2ab6 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi @@ -35,7 +35,7 @@ compatible = "fsl,imx8qxp-lpcg"; reg = <0x5f080000 0x10000>; #clock-cells = <1>; - clocks = <&hsio_per_clk>, <&hsio_per_clk>; + clocks = <&hsio_refa_clk>, <&hsio_per_clk>; bit-offset = <0 4>; clock-output-names = "hsio_phyx2_pclk_0", "hsio_phyx2_pclk_1"; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 77f0269441c8..d1da4a4877de 100755 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -687,7 +687,6 @@ compatible = "fsl,imx8qxp-pcie","snps,dw-pcie"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcieb>; - clkreq-gpio = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>; disable-gpio = <&pca9557_a 2 GPIO_ACTIVE_LOW>; disable2-gpio = <&pca9557_a 0 GPIO_ACTIVE_LOW>; reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; |