arm: tegra13: thermal: enable sensor and throttle

For T132 based 'bowmore' and 'norrin' platforms:
  Modified board and dts file modified to detect I2C thermal sensor.
  Enable balanced thermal throttling using old T12x tables.

Bug 1408640

Change-Id: Ic0ff94f048b7a27fe98ce02a4a9775e4ebd1577e
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>

4 files changed, 131 insertions, 49 deletions

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-pmic-e1936-1000-a00.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-pmic-e1936-1000-a00.dtsi
index 7b684f8073f7..0d28575ca95b 100644
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-pmic-e1936-1000-a00.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-pmic-e1936-1000-a00.dtsi
@@ -1,3 +1,19 @@
+/*
+ * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #include <dt-bindings/gpio/tegra-gpio.h>
 
 / {
@@ -316,6 +332,14 @@
 								regulator-consumer-supply = "vdd";
 								regulator-consumer-device = "0-000d";
 							};
+							c3 {
+								regulator-consumer-supply = "vdd";
+								regulator-consumer-device = "0-004c";
+							};
+							c4 {
+								regulator-consumer-supply = "vdd";
+								regulator-consumer-device = "0-004d";
+							};
 						};
 					};
 
diff --git a/arch/arm/mach-tegra/board-ardbeg-sensors.c b/arch/arm/mach-tegra/board-ardbeg-sensors.c
index 649049131c08..23920b4ec78e 100644
--- a/arch/arm/mach-tegra/board-ardbeg-sensors.c
+++ b/arch/arm/mach-tegra/board-ardbeg-sensors.c
@@ -1124,15 +1124,22 @@ static struct balanced_throttle gpu_throttle = {
 
 static int __init ardbeg_tj_throttle_init(void)
 {
+	void *r1, *r2;
+
 	if (of_machine_is_compatible("nvidia,ardbeg") ||
+	    of_machine_is_compatible("nvidia,norrin") ||
+	    of_machine_is_compatible("nvidia,bowmore") ||
 	    of_machine_is_compatible("nvidia,tn8")) {
-		balanced_throttle_register(&cpu_throttle, "cpu-balanced");
-		balanced_throttle_register(&gpu_throttle, "gpu-balanced");
+		r1 = balanced_throttle_register(&cpu_throttle, "cpu-balanced");
+		r2 = balanced_throttle_register(&gpu_throttle, "gpu-balanced");
+		if (!r1 || !r2)
+			pr_err("%s: balanced_throttle_register FAILED.\n",
+				__func__);
 	}
 
 	return 0;
 }
-module_init(ardbeg_tj_throttle_init);
+late_initcall(ardbeg_tj_throttle_init);
 
 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
 static struct thermal_trip_info skin_trips[] = {
@@ -1511,17 +1518,26 @@ static int ardbeg_nct72_init(void)
 		gpio_free(nct72_port);
 	}
 
+	/* norrin has thermal sensor on GEN1-I2C i.e. instance 0 */
+	if (board_info.board_id == BOARD_PM374)
+		i2c_register_board_info(0, ardbeg_i2c_nct72_board_info,
+					1); /* only register device[0] */
 	/* ardbeg has thermal sensor on GEN2-I2C i.e. instance 1 */
-	if (board_info.board_id == BOARD_PM358 ||
+	else if (board_info.board_id == BOARD_PM358 ||
 			board_info.board_id == BOARD_PM359 ||
 			board_info.board_id == BOARD_PM370 ||
 			board_info.board_id == BOARD_PM374 ||
 			board_info.board_id == BOARD_PM363)
 		i2c_register_board_info(1, laguna_i2c_nct72_board_info,
-		ARRAY_SIZE(laguna_i2c_nct72_board_info));
+			ARRAY_SIZE(laguna_i2c_nct72_board_info));
+	else if (board_info.board_id == BOARD_E1971 ||
+		 board_info.board_id == BOARD_E1991)
+		/* bowmore has thermal sensor on GEN1-I2C i.e. instance 0 */
+		i2c_register_board_info(0, ardbeg_i2c_nct72_board_info,
+					1); /* only register device[0] */
 	else
 		i2c_register_board_info(1, ardbeg_i2c_nct72_board_info,
-		ARRAY_SIZE(ardbeg_i2c_nct72_board_info));
+			ARRAY_SIZE(ardbeg_i2c_nct72_board_info));
 
 	return ret;
 }
diff --git a/arch/arm/mach-tegra/board-norrin-power.c b/arch/arm/mach-tegra/board-norrin-power.c
index 4eac66a9df1b..038b496860bd 100644
--- a/arch/arm/mach-tegra/board-norrin-power.c
+++ b/arch/arm/mach-tegra/board-norrin-power.c
@@ -1,7 +1,7 @@
 /*
  * arch/arm/mach-tegra/board-norrin-power.c
  *
- * Copyright (c) 2013 NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2013-2014 NVIDIA Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -30,6 +30,7 @@
 #include <linux/gpio.h>
 #include <linux/regulator/userspace-consumer.h>
 #include <linux/pid_thermal_gov.h>
+#include <linux/tegra-fuse.h>
 
 #include <asm/mach-types.h>
 
@@ -49,6 +50,7 @@
 #include "devices.h"
 #include "tegra11_soctherm.h"
 #include "iomap.h"
+#include "tegra3_tsensor.h"
 
 #define PMC_CTRL		0x0
 #define PMC_CTRL_INTR_LOW	(1 << 17)
@@ -436,6 +438,7 @@ static struct regulator_consumer_supply fixed_reg_aon_1v8_supply[] = {
 	REGULATOR_SUPPLY("vdd_1v8_emmc", NULL),
 	REGULATOR_SUPPLY("vdd_1v8b_com_f", NULL),
 	REGULATOR_SUPPLY("vdd_1v8b_gps_f", NULL),
+	REGULATOR_SUPPLY("vdd", "0-004c"),
 };
 
 /* Always ON 3.3v */
@@ -498,7 +501,6 @@ static struct regulator_consumer_supply fixed_reg_3v3_supply[] = {
 	REGULATOR_SUPPLY("vdd_tp_3v3", NULL),
 	REGULATOR_SUPPLY("vdd_dtv_3v3", NULL),
 	REGULATOR_SUPPLY("vdd_modem_3v3", NULL),
-	REGULATOR_SUPPLY("vdd", "1-004c"),
 	REGULATOR_SUPPLY("vdd", "0-0048"),
 	REGULATOR_SUPPLY("vdd", "0-0069"),
 	REGULATOR_SUPPLY("vdd", "0-000c"),
@@ -787,6 +789,26 @@ static struct thermal_zone_params soctherm_tzp = {
 	.governor_params = &soctherm_pid_params,
 };
 
+static struct tegra_tsensor_pmu_data tpdata_palmas = {
+	.reset_tegra = 1,
+	.pmu_16bit_ops = 0,
+	.controller_type = 0,
+	.pmu_i2c_addr = 0x58,
+	.i2c_controller_id = 4,
+	.poweroff_reg_addr = 0xa0,
+	.poweroff_reg_data = 0x0,
+};
+
+static struct tegra_tsensor_pmu_data tpdata_as3722 = {
+	.reset_tegra = 1,
+	.pmu_16bit_ops = 0,
+	.controller_type = 0,
+	.pmu_i2c_addr = 0x40,
+	.i2c_controller_id = 4,
+	.poweroff_reg_addr = 0x36,
+	.poweroff_reg_data = 0x2,
+};
+
 static struct soctherm_platform_data norrin_soctherm_data = {
 	.therm = {
 		[THERM_CPU] = {
@@ -797,21 +819,21 @@ static struct soctherm_platform_data norrin_soctherm_data = {
 			.trips = {
 				{
 					.cdev_type = "tegra-shutdown",
-					.trip_temp = 103000,
+					.trip_temp = 101000,
 					.trip_type = THERMAL_TRIP_CRITICAL,
 					.upper = THERMAL_NO_LIMIT,
 					.lower = THERMAL_NO_LIMIT,
 				},
 				{
 					.cdev_type = "tegra-heavy",
-					.trip_temp = 101000,
+					.trip_temp = 99000,
 					.trip_type = THERMAL_TRIP_HOT,
 					.upper = THERMAL_NO_LIMIT,
 					.lower = THERMAL_NO_LIMIT,
 				},
 				{
-					.cdev_type = "tegra-balanced",
-					.trip_temp = 91000,
+					.cdev_type = "cpu-balanced",
+					.trip_temp = 90000,
 					.trip_type = THERMAL_TRIP_PASSIVE,
 					.upper = THERMAL_NO_LIMIT,
 					.lower = THERMAL_NO_LIMIT,
@@ -827,34 +849,25 @@ static struct soctherm_platform_data norrin_soctherm_data = {
 			.trips = {
 				{
 					.cdev_type = "tegra-shutdown",
-					.trip_temp = 104000,
+					.trip_temp = 101000,
 					.trip_type = THERMAL_TRIP_CRITICAL,
 					.upper = THERMAL_NO_LIMIT,
 					.lower = THERMAL_NO_LIMIT,
 				},
 				{
-					.cdev_type = "tegra-balanced",
-					.trip_temp = 92000,
-					.trip_type = THERMAL_TRIP_PASSIVE,
+					.cdev_type = "tegra-heavy",
+					.trip_temp = 99000,
+					.trip_type = THERMAL_TRIP_HOT,
 					.upper = THERMAL_NO_LIMIT,
 					.lower = THERMAL_NO_LIMIT,
 				},
-/*
 				{
-					.cdev_type = "gk20a_cdev",
-					.trip_temp = 102000,
+					.cdev_type = "gpu-balanced",
+					.trip_temp = 90000,
 					.trip_type = THERMAL_TRIP_PASSIVE,
 					.upper = THERMAL_NO_LIMIT,
 					.lower = THERMAL_NO_LIMIT,
 				},
-				{
-					.cdev_type = "tegra-heavy",
-					.trip_temp = 102000,
-					.trip_type = THERMAL_TRIP_HOT,
-					.upper = THERMAL_NO_LIMIT,
-					.lower = THERMAL_NO_LIMIT,
-				},
-*/
 			},
 			.tzp = &soctherm_tzp,
 		},
@@ -864,15 +877,17 @@ static struct soctherm_platform_data norrin_soctherm_data = {
 			.trips = {
 				{
 					.cdev_type = "tegra-shutdown",
-					.trip_temp = 104000, /* = GPU shut */
+					.trip_temp = 101000, /* = GPU shut */
 					.trip_type = THERMAL_TRIP_CRITICAL,
 					.upper = THERMAL_NO_LIMIT,
 					.lower = THERMAL_NO_LIMIT,
 				},
 			},
+			.tzp = &soctherm_tzp,
 		},
 		[THERM_PLL] = {
 			.zone_enable = true,
+			.tzp = &soctherm_tzp,
 		},
 	},
 	.throttle = {
@@ -894,19 +909,42 @@ static struct soctherm_platform_data norrin_soctherm_data = {
 
 int __init norrin_soctherm_init(void)
 {
-	tegra_platform_edp_init(norrin_soctherm_data.therm[THERM_CPU].trips,
+	s32 base_cp, shft_cp;
+	u32 base_ft, shft_ft;
+	struct board_info pmu_board_info;
+	struct board_info board_info;
+
+	tegra_get_board_info(&board_info);
+
+	/* do this only for supported CP,FT fuses */
+	if ((tegra_fuse_calib_base_get_cp(&base_cp, &shft_cp) >= 0) &&
+	    (tegra_fuse_calib_base_get_ft(&base_ft, &shft_ft) >= 0)) {
+		tegra_platform_edp_init(
+			norrin_soctherm_data.therm[THERM_CPU].trips,
 			&norrin_soctherm_data.therm[THERM_CPU].num_trips,
 			7000); /* edp temperature margin */
-	tegra_platform_gpu_edp_init(
+		tegra_platform_gpu_edp_init(
 			norrin_soctherm_data.therm[THERM_GPU].trips,
 			&norrin_soctherm_data.therm[THERM_GPU].num_trips,
 			7000);
-	tegra_add_cpu_vmax_trips(norrin_soctherm_data.therm[THERM_CPU].trips,
+		tegra_add_cpu_vmax_trips(
+			norrin_soctherm_data.therm[THERM_CPU].trips,
 			&norrin_soctherm_data.therm[THERM_CPU].num_trips);
-	tegra_add_tgpu_trips(norrin_soctherm_data.therm[THERM_GPU].trips,
+		tegra_add_tgpu_trips(
+			norrin_soctherm_data.therm[THERM_GPU].trips,
 			&norrin_soctherm_data.therm[THERM_GPU].num_trips);
-	tegra_add_core_vmax_trips(norrin_soctherm_data.therm[THERM_PLL].trips,
+		tegra_add_core_vmax_trips(
+			norrin_soctherm_data.therm[THERM_PLL].trips,
 			&norrin_soctherm_data.therm[THERM_PLL].num_trips);
+	}
+
+	tegra_get_pmu_board_info(&pmu_board_info);
+
+	if (pmu_board_info.board_id == BOARD_PM374)
+		norrin_soctherm_data.tshut_pmu_trip_data = &tpdata_as3722;
+	else
+		pr_warn("soctherm THERMTRIP not supported on PMU (BOARD_P%d)\n",
+			pmu_board_info.board_id);
 
 	return tegra11_soctherm_init(&norrin_soctherm_data);
 }
diff --git a/arch/arm/mach-tegra/tegra3_throttle.c b/arch/arm/mach-tegra/tegra3_throttle.c
index 879c52c310c0..b9a81f3e45cd 100644
--- a/arch/arm/mach-tegra/tegra3_throttle.c
+++ b/arch/arm/mach-tegra/tegra3_throttle.c
@@ -1,20 +1,19 @@
 /*
  * arch/arm/mach-tegra/tegra3_throttle.c
  *
- * Copyright (c) 2011-2013, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2011-2014, NVIDIA CORPORATION. All rights reserved.
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
  *
- * This program is distributed in the hope that it will be useful, but WITHOUT
+ * This program is distributed in the hope it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
 #include <linux/kernel.h>
@@ -326,22 +325,23 @@ struct thermal_cooling_device *balanced_throttle_register(
 	list_add(&bthrot->node, &bthrot_list);
 	mutex_unlock(&bthrot_list_lock);
 
+#ifdef CONFIG_DEBUG_FS
+	sprintf(name, "throttle_table%d", num_throt);
+	if (!throttle_debugfs_root || IS_ERR_OR_NULL(
+		debugfs_create_file(name, 0644, throttle_debugfs_root,
+					bthrot, &table_fops)))
+			return -EINVAL;
+#endif
+
 	bthrot->cdev = thermal_cooling_device_register(
 						type,
 						bthrot,
 						&tegra_throttle_cooling_ops);
-
 	if (IS_ERR(bthrot->cdev)) {
 		bthrot->cdev = NULL;
 		return ERR_PTR(-ENODEV);
 	}
 
-#ifdef CONFIG_DEBUG_FS
-	sprintf(name, "throttle_table%d", num_throt);
-	debugfs_create_file(name,0644, throttle_debugfs_root,
-				bthrot, &table_fops);
-#endif
-
 	return bthrot->cdev;
 }
 
@@ -360,8 +360,12 @@ int __init tegra_throttle_init(struct mutex *cpu_lock)
 		cpu_freq_table[table_data->throttle_lowest_index].frequency;
 
 	cpu_throttle_lock = cpu_lock;
+
 #ifdef CONFIG_DEBUG_FS
-	throttle_debugfs_root = debugfs_create_dir("tegra_throttle", 0);
+	throttle_debugfs_root = debugfs_create_dir("tegra_throttle", NULL);
+	if (IS_ERR_OR_NULL(throttle_debugfs_root))
+		pr_err("%s: debugfs_create_dir 'tegra_throttle' FAILED.\n",
+			__func__);
 #endif
 
 	for (i = 0; i < ARRAY_SIZE(cap_freqs_table); i++) {