Merge branch 'vf610-ac97-sai-v4.0-rebased' into toradex_vf_4.0-next

3 files changed, 102 insertions, 5 deletions

diff --git a/arch/arm/boot/dts/vf610-colibri.dtsi b/arch/arm/boot/dts/vf610-colibri.dtsi
index 19fe045b8334..8bc0548aabc9 100644
--- a/arch/arm/boot/dts/vf610-colibri.dtsi
+++ b/arch/arm/boot/dts/vf610-colibri.dtsi
@@ -17,9 +17,89 @@
 	memory {
 		reg = <0x80000000 0x10000000>;
 	};
+
+	sound {
+		compatible = "fsl,fsl-sai-audio-wm9712";
+		fsl,ac97-controller = <&sai2>;
+
+		fsl,model = "Colibri VF61 AC97 Audio";
+
+		fsl,audio-routing =
+			"Headphone", "HPOUTL",
+			"Headphone", "HPOUTR",
+			"LineIn", "LINEINL",
+			"LineIn", "LINEINR",
+			"Mic", "MIC1";
+	};
+};
+
+&sai0 {
+	compatible = "fsl,vf610-sai-clk";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai0>;
+	status = "okay";
+};
+
+&sai2 {
+	compatible = "fsl,vf610-sai-ac97";
+	#sound-dai-cells = <0>;
+
+	pinctrl-names = "default", "ac97-running", "ac97-reset",
+			"ac97-warm-reset";
+	pinctrl-0 = <&pinctrl_sai2_ac97_running>;
+	pinctrl-1 = <&pinctrl_sai2_ac97_running>;
+	pinctrl-2 = <&pinctrl_sai2_ac97_reset>;
+	pinctrl-3 = <&pinctrl_sai2_ac97_reset>;
+	ac97-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH &gpio0 8 GPIO_ACTIVE_HIGH
+		      &gpio0 13 GPIO_ACTIVE_HIGH>;
+	status = "okay";
 };
 
 &L2 {
 	arm,data-latency = <2 1 2>;
 	arm,tag-latency = <3 2 3>;
 };
+
+&iomuxc {
+	vf610-colibri {
+		pinctrl_sai0: sai0grp_1 {
+			fsl,pins = <
+				VF610_PAD_PTB23__SAI0_TX_BCLK	0x31C3
+			>;
+		};
+		pinctrl_sai2_ac97_reset: sai2grp_1 {
+			fsl,pins = <
+				/* Pen-down */
+				VF610_PAD_PTA11__GPIO_4		0x22ed
+				/* AC97 SData Out (test mode selection) */
+				VF610_PAD_PTA18__GPIO_8		0x22ed
+				/* AC97 Sync (warm reset) */
+				VF610_PAD_PTA19__GPIO_9		0x22ed
+				/* AC97 Reset (cold reset) */
+				VF610_PAD_PTA23__GPIO_13	0x22eb
+			>;
+		};
+
+		pinctrl_sai2_ac97_running: sai2grp_2 {
+			fsl,pins = <
+				/* AC97 Bit clock */
+				VF610_PAD_PTA16__SAI2_TX_BCLK	0x31C3
+
+				/* AC97 SData Out */
+				VF610_PAD_PTA18__SAI2_TX_DATA	0x31C2
+
+				/* AC97 Sync */
+				VF610_PAD_PTA19__SAI2_TX_SYNC	0x31C3
+
+				/* AC97 SData In */
+				VF610_PAD_PTA22__SAI2_RX_DATA	0x0041
+
+				/* AC97 Reset (cold reset, keep output buffer on) */
+				VF610_PAD_PTA23__GPIO_13	0x22eb
+
+				/* GenIRQ */
+				VF610_PAD_PTB2__GPIO_24		0x22ed
+			>;
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 10e71a5f420f..4d678dda9784 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -174,12 +174,28 @@
 				status = "disabled";
 			};
 
+			sai0: sai@4002f000 {
+				compatible = "fsl,vf610-sai";
+				reg = <0x4002f000 0x1000>;
+				interrupts = <84 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks VF610_CLK_SAI0>,
+					<&clks VF610_CLK_SAI0>,
+					<&clks 0>, <&clks 0>;
+				clock-names = "bus", "mclk1", "mclk2", "mclk3";
+				dma-names = "tx", "rx";
+				dmas = <&edma0 0 17>,
+					<&edma0 0 16>;
+				status = "disabled";
+			};
+
 			sai2: sai@40031000 {
 				compatible = "fsl,vf610-sai";
 				reg = <0x40031000 0x1000>;
 				interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks VF610_CLK_SAI2>;
-				clock-names = "sai";
+				clocks = <&clks VF610_CLK_SAI2>,
+					<&clks VF610_CLK_SAI2>,
+					<&clks 0>, <&clks 0>;
+				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "tx", "rx";
 				dmas = <&edma0 0 21>,
 					<&edma0 0 20>;
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index ad11bd62d2da..d707a21dfda9 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -398,10 +398,11 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
 	clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2);
 	clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2);
 
-	clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]);
-	clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]);
-	clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]);
+	clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_PLL4_MAIN_DIV]);
+	clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_PLL4_MAIN_DIV]);
+	clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_PLL4_MAIN_DIV]);
 	clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]);
+	clk_set_rate(clk[VF610_CLK_PLL4_MAIN_DIV], 147456000);
 
 	clk_set_parent(clk[VF610_CLK_DCU0_SEL], clk[VF610_CLK_PLL1_PFD2]);
 	clk_set_rate(clk[VF610_CLK_DCU0_DIV], 113200000);