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author | Stefan Agner <stefan@agner.ch> | 2017-06-08 15:34:47 -0700 |
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committer | Stefan Agner <stefan@agner.ch> | 2017-11-20 14:31:16 +0100 |
commit | 23ed0c25201c49ab8cf12efa182a6210bbffb1b7 (patch) | |
tree | beffd0f1f0fc150f73e731b056ecbb90d1eef17f /arch/arm | |
parent | 7fa15058a4e7775422224e3e1075bf3cbb7933d9 (diff) |
clk: imx7d: create clocks behind rawnand clock gate
The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
and NAND_CLK_ROOT. However, the gate has been in the chain of the
latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
only, e.g. as required by APBH-Bridge-DMA.
Add new clocks which represent the clock after the gate, and use a
shared clock gate to correctly model the hardware.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 22039d150f716e4e56215d70ad23fb92caa4476e)
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions