diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-10-21 17:27:57 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-10-22 21:59:15 +0900 |
commit | 1bdb60ef18655596d56b9b7268ad0bf5214e00e4 (patch) | |
tree | b3baaf9aff51aaf5267db52cc04d2133a0b062b6 /arch/arm | |
parent | 19eb4a47224da4bc118f1e304e16b6c08ed172c9 (diff) |
ARM: dts: uniphier: change MIO node to SD control node
I made a mistake bacuse the Media I/O block is not implemented in
these SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/uniphier-pro5.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/uniphier-pxs2.dtsi | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index 2c49c3614bda..5357ea9c14b1 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -184,11 +184,11 @@ }; &mio_clk { - compatible = "socionext,uniphier-pro5-mio-clock"; + compatible = "socionext,uniphier-pro5-sd-clock"; }; &mio_rst { - compatible = "socionext,uniphier-pro5-mio-reset"; + compatible = "socionext,uniphier-pro5-sd-reset"; }; &peri_clk { diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 8789cd518933..950f07ba0337 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -197,11 +197,11 @@ }; &mio_clk { - compatible = "socionext,uniphier-pxs2-mio-clock"; + compatible = "socionext,uniphier-pxs2-sd-clock"; }; &mio_rst { - compatible = "socionext,uniphier-pxs2-mio-reset"; + compatible = "socionext,uniphier-pxs2-sd-reset"; }; &peri_clk { |