diff options
author | Shawn Guo <shawn.guo@freescale.com> | 2014-06-15 20:36:50 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:16:27 -0600 |
commit | 89e09713ab21098d3432e9cf37dc9bcc0a79282f (patch) | |
tree | 9fb2b00ae58a24ee8f81f95ac11a4adce1a658f2 /arch/arm | |
parent | 03337e01f89729949a475e2b1f016b012db8b0d7 (diff) |
ARM: dts: imx6qdl: use DT macro for clock ID
Switch to use DT macro for clock ID, so that device tree source is more
readable.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
[shawn.guo: cherry-pick from community IMX tree]
Conflicts:
arch/arm/boot/dts/imx6dl.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 17 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 27 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 135 |
3 files changed, 113 insertions, 66 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index cbcf4b576d3c..edb7414c7e38 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -35,8 +35,11 @@ 396000 1175000 >; clock-latency = <61036>; /* two CLK32 periods */ - clocks = <&clks 104>, <&clks 6>, <&clks 16>, - <&clks 17>, <&clks 170>; + clocks = <&clks IMX6QDL_CLK_ARM>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_STEP>, + <&clks IMX6QDL_CLK_PLL1_SW>, + <&clks IMX6QDL_CLK_PLL1_SYS>; clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys"; arm-supply = <®_arm>; @@ -56,7 +59,7 @@ ocram: sram@00900000 { compatible = "mmio-sram"; reg = <0x00900000 0x20000>; - clocks = <&clks 142>; + clocks = <&clks IMX6QDL_CLK_OCRAM>; }; aips1: aips-bus@02000000 { @@ -87,7 +90,7 @@ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021f8000 0x4000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 116>; + clocks = <&clks IMX6DL_CLK_I2C4>; status = "disabled"; }; }; @@ -95,9 +98,9 @@ }; &ldb { - clocks = <&clks 33>, <&clks 34>, - <&clks 39>, <&clks 40>, - <&clks 135>, <&clks 136>; + clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>, + <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, + <&clks IMX6QDL_CLK_LDB_DI0>, <&clks IMX6QDL_CLK_LDB_DI1>; clock-names = "di0_pll", "di1_pll", "di0_sel", "di1_sel", "di0", "di1"; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index ae0554b2c639..6d3c8242fd87 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -39,8 +39,11 @@ 396000 1175000 >; clock-latency = <61036>; /* two CLK32 periods */ - clocks = <&clks 104>, <&clks 6>, <&clks 16>, - <&clks 17>, <&clks 170>; + clocks = <&clks IMX6QDL_CLK_ARM>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_STEP>, + <&clks IMX6QDL_CLK_PLL1_SW>, + <&clks IMX6QDL_CLK_PLL1_SYS>; clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys"; arm-supply = <®_arm>; @@ -74,7 +77,7 @@ ocram: sram@00900000 { compatible = "mmio-sram"; reg = <0x00900000 0x40000>; - clocks = <&clks 142>; + clocks = <&clks IMX6QDL_CLK_OCRAM>; }; aips-bus@02000000 { /* AIPS1 */ @@ -85,7 +88,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02018000 0x4000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 116>, <&clks 116>; + clocks = <&clks IMX6Q_CLK_ECSPI5>, + <&clks IMX6Q_CLK_ECSPI5>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -136,7 +140,9 @@ compatible = "fsl,imx6q-ahci"; reg = <0x02200000 0x4000>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 154>, <&clks 187>, <&clks 105>; + clocks = <&clks IMX6QDL_CLK_SATA>, + <&clks IMX6QDL_CLK_SATA_REF_100M>, + <&clks IMX6QDL_CLK_AHB>; clock-names = "sata", "sata_ref", "ahb"; status = "disabled"; }; @@ -147,7 +153,9 @@ reg = <0x02800000 0x400000>; interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>, <0 7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 133>, <&clks 134>, <&clks 137>; + clocks = <&clks IMX6QDL_CLK_IPU2>, + <&clks IMX6QDL_CLK_IPU2_DI0>, + <&clks IMX6QDL_CLK_IPU2_DI1>; clock-names = "bus", "di0", "di1"; resets = <&src 4>; }; @@ -155,9 +163,10 @@ }; &ldb { - clocks = <&clks 33>, <&clks 34>, - <&clks 39>, <&clks 40>, <&clks 41>, <&clks 42>, - <&clks 135>, <&clks 136>; + clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>, + <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, + <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>, + <&clks IMX6QDL_CLK_LDB_DI0>, <&clks IMX6QDL_CLK_LDB_DI1>; clock-names = "di0_pll", "di1_pll", "di0_sel", "di1_sel", "di2_sel", "di3_sel", "di0", "di1"; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 8a7713a2a5ab..cf32e1cd0e88 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -10,6 +10,8 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include <dt-bindings/clock/imx6qdl-clock.h> + #include "skeleton.dtsi" / { @@ -84,7 +86,7 @@ interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; #dma-cells = <1>; dma-channels = <4>; - clocks = <&clks 106>; + clocks = <&clks IMX6QDL_CLK_APBH_DMA>; }; gpmi: gpmi-nand@00112000 { @@ -95,8 +97,11 @@ reg-names = "gpmi-nand", "bch"; interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "bch"; - clocks = <&clks 152>, <&clks 153>, <&clks 151>, - <&clks 150>, <&clks 149>; + clocks = <&clks IMX6QDL_CLK_GPMI_IO>, + <&clks IMX6QDL_CLK_GPMI_APB>, + <&clks IMX6QDL_CLK_GPMI_BCH>, + <&clks IMX6QDL_CLK_GPMI_BCH_APB>, + <&clks IMX6QDL_CLK_PER1_BCH>; clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch"; dmas = <&dma_apbh 0>; @@ -108,7 +113,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0x00a00600 0x20>; interrupts = <1 13 0xf01>; - clocks = <&clks 15>; + clocks = <&clks IMX6QDL_CLK_TWD>; }; L2: l2-cache@00a02000 { @@ -132,7 +137,8 @@ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ num-lanes = <1>; interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; + clocks = <&clks IMX6QDL_CLK_PCIE_REF_125M>, <&clks IMX6QDL_CLK_SATA_REF_100M>, + <&clks IMX6QDL_CLK_LVDS1_GATE>, <&clks IMX6QDL_CLK_PCIE_AXI>; clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; status = "disabled"; }; @@ -163,11 +169,11 @@ dmas = <&sdma 14 18 0>, <&sdma 15 18 0>; dma-names = "rx", "tx"; - clocks = <&clks 197>, <&clks 3>, - <&clks 197>, <&clks 107>, - <&clks 0>, <&clks 118>, - <&clks 0>, <&clks 139>, - <&clks 0>; + clocks = <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_OSC>, + <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>, + <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI>, + <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_MLB>, + <&clks IMX6QDL_CLK_DUMMY>; clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", @@ -182,7 +188,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02008000 0x4000>; interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 112>, <&clks 112>; + clocks = <&clks IMX6QDL_CLK_ECSPI1>, + <&clks IMX6QDL_CLK_ECSPI1>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -193,7 +200,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x0200c000 0x4000>; interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 113>, <&clks 113>; + clocks = <&clks IMX6QDL_CLK_ECSPI2>, + <&clks IMX6QDL_CLK_ECSPI2>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -204,7 +212,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02010000 0x4000>; interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 114>, <&clks 114>; + clocks = <&clks IMX6QDL_CLK_ECSPI3>, + <&clks IMX6QDL_CLK_ECSPI3>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -215,7 +224,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02014000 0x4000>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 115>, <&clks 115>; + clocks = <&clks IMX6QDL_CLK_ECSPI4>, + <&clks IMX6QDL_CLK_ECSPI4>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -224,7 +234,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x02020000 0x4000>; interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 160>, <&clks 161>; + clocks = <&clks IMX6QDL_CLK_UART_IPG>, + <&clks IMX6QDL_CLK_UART_SERIAL>; clock-names = "ipg", "per"; dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; dma-names = "rx", "tx"; @@ -240,7 +251,7 @@ compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x02028000 0x4000>; interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 178>; + clocks = <&clks IMX6QDL_CLK_SSI1_IPG>; dmas = <&sdma 37 1 0>, <&sdma 38 1 0>; dma-names = "rx", "tx"; @@ -253,7 +264,7 @@ compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x0202c000 0x4000>; interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 179>; + clocks = <&clks IMX6QDL_CLK_SSI2_IPG>; dmas = <&sdma 41 1 0>, <&sdma 42 1 0>; dma-names = "rx", "tx"; @@ -266,7 +277,7 @@ compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x02030000 0x4000>; interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 180>; + clocks = <&clks IMX6QDL_CLK_SSI3_IPG>; dmas = <&sdma 45 1 0>, <&sdma 46 1 0>; dma-names = "rx", "tx"; @@ -300,7 +311,8 @@ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x02080000 0x4000>; interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 62>, <&clks 145>; + clocks = <&clks IMX6QDL_CLK_IPG>, + <&clks IMX6QDL_CLK_PWM1>; clock-names = "ipg", "per"; }; @@ -309,7 +321,8 @@ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x02084000 0x4000>; interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 62>, <&clks 146>; + clocks = <&clks IMX6QDL_CLK_IPG>, + <&clks IMX6QDL_CLK_PWM2>; clock-names = "ipg", "per"; }; @@ -318,7 +331,8 @@ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x02088000 0x4000>; interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 62>, <&clks 147>; + clocks = <&clks IMX6QDL_CLK_IPG>, + <&clks IMX6QDL_CLK_PWM3>; clock-names = "ipg", "per"; }; @@ -327,7 +341,8 @@ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; reg = <0x0208c000 0x4000>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 62>, <&clks 148>; + clocks = <&clks IMX6QDL_CLK_IPG>, + <&clks IMX6QDL_CLK_PWM4>; clock-names = "ipg", "per"; }; @@ -335,7 +350,8 @@ compatible = "fsl,imx6q-flexcan"; reg = <0x02090000 0x4000>; interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 108>, <&clks 109>; + clocks = <&clks IMX6QDL_CLK_CAN1_IPG>, + <&clks IMX6QDL_CLK_CAN1_SERIAL>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -344,7 +360,8 @@ compatible = "fsl,imx6q-flexcan"; reg = <0x02094000 0x4000>; interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 110>, <&clks 111>; + clocks = <&clks IMX6QDL_CLK_CAN2_IPG>, + <&clks IMX6QDL_CLK_CAN2_SERIAL>; clock-names = "ipg", "per"; status = "disabled"; }; @@ -353,7 +370,8 @@ compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; reg = <0x02098000 0x4000>; interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 119>, <&clks 120>; + clocks = <&clks IMX6QDL_CLK_GPT_IPG>, + <&clks IMX6QDL_CLK_GPT_IPG_PER>; clock-names = "ipg", "per"; }; @@ -443,14 +461,14 @@ compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020bc000 0x4000>; interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 0>; + clocks = <&clks IMX6QDL_CLK_DUMMY>; }; wdog2: wdog@020c0000 { compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020c0000 0x4000>; interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 0>; + clocks = <&clks IMX6QDL_CLK_DUMMY>; status = "disabled"; }; @@ -568,14 +586,14 @@ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; fsl,tempmon = <&anatop>; fsl,tempmon-data = <&ocotp>; - clocks = <&clks 172>; + clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>; }; usbphy1: usbphy@020c9000 { compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 182>; + clocks = <&clks IMX6QDL_CLK_USBPHY1>; fsl,anatop = <&anatop>; }; @@ -583,7 +601,7 @@ compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020ca000 0x1000>; interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 183>; + clocks = <&clks IMX6QDL_CLK_USBPHY2>; fsl,anatop = <&anatop>; }; @@ -668,7 +686,8 @@ compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; reg = <0x020ec000 0x4000>; interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 155>, <&clks 155>; + clocks = <&clks IMX6QDL_CLK_SDMA>, + <&clks IMX6QDL_CLK_SDMA>; clock-names = "ipg", "ahb"; #dma-cells = <3>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; @@ -696,7 +715,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 162>; + clocks = <&clks IMX6QDL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; status = "disabled"; @@ -706,7 +725,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 162>; + clocks = <&clks IMX6QDL_CLK_USBOH3>; fsl,usbphy = <&usbphy2>; fsl,usbmisc = <&usbmisc 1>; status = "disabled"; @@ -716,7 +735,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 162>; + clocks = <&clks IMX6QDL_CLK_USBOH3>; fsl,usbmisc = <&usbmisc 2>; status = "disabled"; }; @@ -725,7 +744,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184600 0x200>; interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 162>; + clocks = <&clks IMX6QDL_CLK_USBOH3>; fsl,usbmisc = <&usbmisc 3>; status = "disabled"; }; @@ -734,7 +753,7 @@ #index-cells = <1>; compatible = "fsl,imx6q-usbmisc"; reg = <0x02184800 0x200>; - clocks = <&clks 162>; + clocks = <&clks IMX6QDL_CLK_USBOH3>; }; fec: ethernet@02188000 { @@ -743,7 +762,9 @@ interrupts-extended = <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 117>, <&clks 117>, <&clks 190>; + clocks = <&clks IMX6QDL_CLK_ENET>, + <&clks IMX6QDL_CLK_ENET>, + <&clks IMX6QDL_CLK_ENET_REF>; clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; @@ -759,7 +780,9 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x02190000 0x4000>; interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 163>, <&clks 163>, <&clks 163>; + clocks = <&clks IMX6QDL_CLK_USDHC1>, + <&clks IMX6QDL_CLK_USDHC1>, + <&clks IMX6QDL_CLK_USDHC1>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; status = "disabled"; @@ -769,7 +792,9 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x02194000 0x4000>; interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 164>, <&clks 164>, <&clks 164>; + clocks = <&clks IMX6QDL_CLK_USDHC2>, + <&clks IMX6QDL_CLK_USDHC2>, + <&clks IMX6QDL_CLK_USDHC2>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; status = "disabled"; @@ -779,7 +804,9 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x02198000 0x4000>; interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 165>, <&clks 165>, <&clks 165>; + clocks = <&clks IMX6QDL_CLK_USDHC3>, + <&clks IMX6QDL_CLK_USDHC3>, + <&clks IMX6QDL_CLK_USDHC3>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; status = "disabled"; @@ -789,7 +816,9 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x0219c000 0x4000>; interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 166>, <&clks 166>, <&clks 166>; + clocks = <&clks IMX6QDL_CLK_USDHC4>, + <&clks IMX6QDL_CLK_USDHC4>, + <&clks IMX6QDL_CLK_USDHC4>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; status = "disabled"; @@ -801,7 +830,7 @@ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a0000 0x4000>; interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 125>; + clocks = <&clks IMX6QDL_CLK_I2C1>; status = "disabled"; }; @@ -811,7 +840,7 @@ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a4000 0x4000>; interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 126>; + clocks = <&clks IMX6QDL_CLK_I2C2>; status = "disabled"; }; @@ -821,7 +850,7 @@ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a8000 0x4000>; interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 127>; + clocks = <&clks IMX6QDL_CLK_I2C3>; status = "disabled"; }; @@ -842,7 +871,7 @@ compatible = "fsl,imx6q-weim"; reg = <0x021b8000 0x4000>; interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 196>; + clocks = <&clks IMX6QDL_CLK_EIM_SLOW>; }; ocotp: ocotp@021bc000 { @@ -883,7 +912,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021e8000 0x4000>; interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 160>, <&clks 161>; + clocks = <&clks IMX6QDL_CLK_UART_IPG>, + <&clks IMX6QDL_CLK_UART_SERIAL>; clock-names = "ipg", "per"; dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; dma-names = "rx", "tx"; @@ -894,7 +924,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021ec000 0x4000>; interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 160>, <&clks 161>; + clocks = <&clks IMX6QDL_CLK_UART_IPG>, + <&clks IMX6QDL_CLK_UART_SERIAL>; clock-names = "ipg", "per"; dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; dma-names = "rx", "tx"; @@ -905,7 +936,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f0000 0x4000>; interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 160>, <&clks 161>; + clocks = <&clks IMX6QDL_CLK_UART_IPG>, + <&clks IMX6QDL_CLK_UART_SERIAL>; clock-names = "ipg", "per"; dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; dma-names = "rx", "tx"; @@ -916,7 +948,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f4000 0x4000>; interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 160>, <&clks 161>; + clocks = <&clks IMX6QDL_CLK_UART_IPG>, + <&clks IMX6QDL_CLK_UART_SERIAL>; clock-names = "ipg", "per"; dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; dma-names = "rx", "tx"; @@ -930,7 +963,9 @@ reg = <0x02400000 0x400000>; interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>, <0 5 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 130>, <&clks 131>, <&clks 132>; + clocks = <&clks IMX6QDL_CLK_IPU1>, + <&clks IMX6QDL_CLK_IPU1_DI0>, + <&clks IMX6QDL_CLK_IPU1_DI1>; clock-names = "bus", "di0", "di1"; resets = <&src 2>; }; |