diff options
author | Scott Williams <scwilliams@nvidia.com> | 2011-05-23 22:08:42 -0700 |
---|---|---|
committer | Niket Sirsi <nsirsi@nvidia.com> | 2011-05-31 18:17:24 -0700 |
commit | e970a89c04311bf505d5dbae79439ec6fcf1067c (patch) | |
tree | 240cac876eb079974c55a6260b6ed225c71d8d13 /arch/arm | |
parent | bc22c56ecb54ec093262cee4b1105c2503e5497e (diff) |
arm: tegra: Clean up SOC conditionals
Change SOC conditionals to make them more forward-looking.
Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9
Reviewed-on: http://git-master/r/32706
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-tegra/common.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-tegra/cortex-a9.S | 8 | ||||
-rw-r--r-- | arch/arm/mach-tegra/devices.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-tegra/devices.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-tegra/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/fuse.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/fuse.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/gpio.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/audio.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/iomap.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/mc.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/memory.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/pinmux.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-tegra/iovmm-smmu.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/mc.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/pinmux.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/platsmp.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/spi_tegra_slave.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/suspend.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-tegra/usb_phy.c | 14 |
20 files changed, 58 insertions, 65 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 3be587273598..5e4856b26e2b 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -79,7 +79,13 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { "pll_p_out1", "pll_p", 28800000, true }, { "pll_p_out2", "pll_p", 48000000, true }, { "pll_p_out3", "pll_p", 72000000, true }, -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifdef CONFIG_ARCH_TEGRA_2x_SOC + { "pll_m", "clk_m", 600000000, true }, + { "pll_m_out1", "pll_m", 120000000, true }, + { "sclk", "pll_m_out1", 40000000, true }, + { "hclk", "sclk", 40000000, true }, + { "pclk", "hclk", 40000000, true }, +#else { "pll_m_out1", "pll_m", 275000000, true }, { "pll_c", NULL, ULONG_MAX, false }, { "pll_c_out1", "pll_c", 208000000, false }, @@ -87,12 +93,6 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { "sclk", "pll_p_out4", 108000000, true }, { "hclk", "sclk", 108000000, true }, { "pclk", "hclk", 54000000, true }, -#else - { "pll_m", "clk_m", 600000000, true }, - { "pll_m_out1", "pll_m", 120000000, true }, - { "sclk", "pll_m_out1", 40000000, true }, - { "hclk", "sclk", 40000000, true }, - { "pclk", "hclk", 40000000, true }, #endif { "pll_x", NULL, 0, true }, { "cpu", NULL, 0, true }, @@ -107,7 +107,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { "sdmmc1", "pll_c", 48000000, false}, { "sdmmc3", "pll_p", 48000000, false}, { "sdmmc4", "pll_p", 48000000, false}, -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC { "vde", "pll_c", ULONG_MAX, false }, { "host1x", "pll_c", 0, false }, { "mpe", "pll_c", 0, false }, @@ -133,7 +133,7 @@ void __init tegra_init_cache(void) When called form Normal we obtain an abort. Instructions that must be called in Secure : - Tag and Data RAM Latency Control Registers (0x108 & 0x10C) must be written in Secure. - + The following section of code has been regrouped in the implementation of "l2x0_init". The "l2x0_init" will in fact call an SMC intruction to switch from Normal context to Secure context. The configuration and activation will be done in Secure. @@ -174,8 +174,7 @@ static void __init tegra_init_power(void) { tegra_powergate_power_off(TEGRA_POWERGATE_MPE); tegra_powergate_power_off(TEGRA_POWERGATE_3D); -#ifndef CONFIG_ARCH_TEGRA_3x_SOC - /* for TEGRA_3x_SOC it will be handled seperately */ +#ifdef CONFIG_ARCH_TEGRA_2x_SOC tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); #endif } diff --git a/arch/arm/mach-tegra/cortex-a9.S b/arch/arm/mach-tegra/cortex-a9.S index 07bddbb8ff86..ea04074147df 100644 --- a/arch/arm/mach-tegra/cortex-a9.S +++ b/arch/arm/mach-tegra/cortex-a9.S @@ -448,7 +448,7 @@ ENTRY(__cortex_a9_restore) orrne r3, r3, #(2<<8) @ set MAXCLKLATENCY to 2 on LP #endif #ifndef CONFIG_TRUSTED_FOUNDATIONS - //TL : moved to secure + //TL : moved to secure mcr p15, 0, r3, c15, c0, 0 @ pctlr #endif @@ -555,7 +555,7 @@ ENTRY(__cortex_a9_restore) mcr p15, 0, lr, c1, c0, 2 @ cpacr (loaded before VFP) #ifndef CONFIG_TRUSTED_FOUNDATIONS - //TL : moved to secure + //TL : moved to secure ldr r9, [r8, #CTX_DIAGNOSTIC] mcr p15, 0, r9, c15, c0, 1 @ diag #endif @@ -610,7 +610,7 @@ ENTRY(__cortex_a9_l2x0_restart) mov32 r9, (TEGRA_ARM_PL310_BASE-IO_CPU_PHYS+IO_CPU_VIRT) add r10, r8, #CTX_L2_CTRL ldmia r10, {r3-r7} -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC #ifndef CONFIG_TEGRA_FPGA_PLATFORM mov32 r5, (TEGRA_FLOW_CTRL_BASE-IO_PPSB_PHYS+IO_PPSB_VIRT) ldr r5, [r5, #0x2C] @ FLOW_CTRL_CLUSTER_CONTROL @@ -649,7 +649,7 @@ __reenable_l2x0: #else cmp r3, #0 @ only call SMC if L2 was enable beq l2_done - + cmp r0, #0 @ if invalidate, call SMC with R1=1, else R1=4 moveq r1, #4 movne r1, #1 diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index 4ea50378650d..8d8af50d9fb1 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c @@ -70,7 +70,7 @@ static struct resource i2c_resource3[] = { }, }; -#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +#ifdef CONFIG_ARCH_TEGRA_2x_SOC static struct resource i2c_resource4[] = { [0] = { .start = INT_DVC, @@ -84,7 +84,7 @@ static struct resource i2c_resource4[] = { }, }; -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else static struct resource i2c_resource4[] = { [0] = { .start = INT_I2C4, @@ -152,7 +152,7 @@ struct platform_device tegra_i2c_device4 = { }, }; -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC struct platform_device tegra_i2c_device5 = { .name = "tegra-i2c", .id = 4, @@ -215,7 +215,7 @@ static struct resource spi_resource4[] = { .flags = IORESOURCE_MEM, }, }; -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC static struct resource spi_resource5[] = { [0] = { .start = INT_SPI_5, @@ -282,7 +282,7 @@ struct platform_device tegra_spi_device4 = { .coherent_dma_mask = 0xffffffff, }, }; -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC struct platform_device tegra_spi_device5 = { .name = "spi_tegra", .id = 4, @@ -343,7 +343,7 @@ struct platform_device tegra_spi_slave_device4 = { .coherent_dma_mask = 0xffffffff, }, }; -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC struct platform_device tegra_spi_slave_device5 = { .name = "spi_slave_tegra", .id = 4, @@ -596,7 +596,7 @@ struct platform_device tegra_otg_device = { .num_resources = ARRAY_SIZE(tegra_otg_resources), }; -#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +#ifdef CONFIG_ARCH_TEGRA_2x_SOC static struct resource i2s_resource1[] = { [0] = { .start = INT_I2S1, @@ -665,7 +665,7 @@ static struct resource spdif_resource[] = { } }; -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else static struct resource audio_resource[] = { [0] = { .start = TEGRA_AUDIO_CLUSTER_BASE, @@ -856,7 +856,7 @@ static struct resource pmu_resources[] = { .end = INT_CPU1_PMU_INTR, .flags = IORESOURCE_IRQ, }, -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC [2] = { .start = INT_CPU2_PMU_INTR, .end = INT_CPU2_PMU_INTR, @@ -877,7 +877,7 @@ struct platform_device pmu_device = { .resource = pmu_resources, }; -#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +#ifdef CONFIG_ARCH_TEGRA_2x_SOC #define CLK_RESET_RST_SOURCE 0x0 static struct resource tegra_wdt_resources[] = { [0] = { @@ -896,7 +896,7 @@ static struct resource tegra_wdt_resources[] = { .flags = IORESOURCE_IRQ, }, }; -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else static struct resource tegra_wdt_resources[] = { [0] = { .start = TEGRA_WDT0_BASE, diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h index 6baf7c21ab0b..afe2249ba1ef 100644 --- a/arch/arm/mach-tegra/devices.h +++ b/arch/arm/mach-tegra/devices.h @@ -34,7 +34,7 @@ extern struct platform_device tegra_i2c_device2; extern struct platform_device tegra_i2c_device3; extern struct platform_device tegra_i2c_device4; extern struct platform_device tegra_kbc_device; -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC extern struct platform_device tegra_i2c_device5; #endif extern struct platform_device tegra_spi_device1; @@ -45,7 +45,7 @@ extern struct platform_device tegra_spi_slave_device1; extern struct platform_device tegra_spi_slave_device2; extern struct platform_device tegra_spi_slave_device3; extern struct platform_device tegra_spi_slave_device4; -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC extern struct platform_device tegra_spi_device5; extern struct platform_device tegra_spi_device6; extern struct platform_device tegra_spi_slave_device5; @@ -58,7 +58,7 @@ extern struct platform_device tegra_ehci2_device; extern struct platform_device tegra_ehci3_device; extern struct platform_device tegra_i2s_device1; extern struct platform_device tegra_i2s_device2; -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC extern struct platform_device tegra_i2s_device0; extern struct platform_device tegra_i2s_device3; extern struct platform_device tegra_i2s_device4; diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index a124b5d68701..a46dd0b3001d 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -938,7 +938,7 @@ int __init tegra_dma_init(void) spin_lock_init(&ch->lock); INIT_LIST_HEAD(&ch->list); -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC if (i >= 16) irq = INT_APB_DMA_CH16 + i - 16; else diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index 5ef69f2d0340..5b2499a859f3 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -33,7 +33,7 @@ #define FUSE_UID_LOW 0x108 #define FUSE_UID_HIGH 0x10c #define FUSE_SPARE_BIT 0x200 -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else #define FUSE_VENDOR_CODE 0x200 #define FUSE_VENDOR_CODE_MASK 0xf #define FUSE_FAB_CODE 0x204 diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h index 367308b21098..80c6082d768c 100644 --- a/arch/arm/mach-tegra/fuse.h +++ b/arch/arm/mach-tegra/fuse.h @@ -20,7 +20,7 @@ enum tegra_revision { TEGRA_REVISION_UNKNOWN = 0, -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#if !defined(CONFIG_ARCH_TEGRA_2x_SOC) TEGRA_REVISION_A01, #endif TEGRA_REVISION_A02, diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 25d1eaa31de1..f3dfd6fba748 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -96,7 +96,7 @@ static struct tegra_gpio_bank tegra_gpio_banks[] = { {.bank = 4, .irq = INT_GPIO5}, {.bank = 5, .irq = INT_GPIO6}, {.bank = 6, .irq = INT_GPIO7}, -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC {.bank = 7, .irq = INT_GPIO8}, #endif }; diff --git a/arch/arm/mach-tegra/include/mach/audio.h b/arch/arm/mach-tegra/include/mach/audio.h index 2210d8ab0ea2..816361fc6897 100644 --- a/arch/arm/mach-tegra/include/mach/audio.h +++ b/arch/arm/mach-tegra/include/mach/audio.h @@ -94,7 +94,7 @@ #define AUDIO_FIFO_32 3 #define AUDIO_FIFO_PACKED 7 -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else #define AUDIO_BIT_SIZE_4 0 #define AUDIO_BIT_SIZE_8 1 diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index ed8a028c79dc..4a21863c2e52 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -81,9 +81,7 @@ #define TEGRA_GART_BASE 0x58000000 #define TEGRA_GART_SIZE SZ_32M -#endif - -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else #define TEGRA_SMMU_BASE_A01 0xe0000000 #define TEGRA_SMMU_SIZE_A01 SZ_256M @@ -113,7 +111,7 @@ #define TEGRA_QUATERNARY_ICTLR_BASE 0x60004300 #define TEGRA_QUATERNARY_ICTLR_SIZE 64 -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC #define TEGRA_QUINARY_ICTLR_BASE 0x60004400 #define TEGRA_QUINARY_ICTLR_SIZE SZ_64 @@ -135,7 +133,7 @@ #define TEGRA_TMR4_BASE 0x60005058 #define TEGRA_TMR4_SIZE 8 -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC #define TEGRA_TMR5_BASE 0x60005060 #define TEGRA_TMR5_SIZE 8 @@ -195,9 +193,7 @@ #define TEGRA_AVP_CACHE_BASE 0x6000C000 #define TEGRA_AVP_CACHE_SIZE 4 -#endif - -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else #define TEGRA_AHB_ARB_BASE 0x6000C000 #define TEGRA_AHB_ARB_SIZE 768 /* Overlaps with GISMO */ @@ -347,7 +343,7 @@ #define TEGRA_SPI_BASE 0x7000C380 #define TEGRA_SPI_SIZE 48 -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else #define TEGRA_DTV_BASE 0x7000C300 #define TEGRA_DTV_SIZE SZ_256 @@ -390,7 +386,7 @@ #define TEGRA_SPI4_BASE 0x7000DA00 #define TEGRA_SPI4_SIZE SZ_512 -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC #define TEGRA_SPI5_BASE 0x7000DC00 #define TEGRA_SPI5_SIZE SZ_512 @@ -447,7 +443,7 @@ #define TEGRA_SDMMC4_BASE 0xC8000600 #define TEGRA_SDMMC4_SIZE SZ_512 -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else #define TEGRA_SATA_BASE 0x70020000 #define TEGRA_SATA_SIZE SZ_64K diff --git a/arch/arm/mach-tegra/include/mach/mc.h b/arch/arm/mach-tegra/include/mach/mc.h index 5b909a506f2f..c2b73bd2c8b4 100644 --- a/arch/arm/mach-tegra/include/mach/mc.h +++ b/arch/arm/mach-tegra/include/mach/mc.h @@ -98,7 +98,7 @@ void tegra_mc_set_priority(unsigned long client, unsigned long prio); -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else /* !!!FIXME!!! IMPLEMENT ME */ #define tegra_mc_set_priority(client, prio) \ do { /* nothing for now */ } while (0) diff --git a/arch/arm/mach-tegra/include/mach/memory.h b/arch/arm/mach-tegra/include/mach/memory.h index e2a500ef5ae0..d8bdd5daf2d8 100644 --- a/arch/arm/mach-tegra/include/mach/memory.h +++ b/arch/arm/mach-tegra/include/mach/memory.h @@ -24,10 +24,8 @@ /* physical offset of RAM */ #if defined(CONFIG_ARCH_TEGRA_2x_SOC) #define PHYS_OFFSET UL(0) -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) -#define PHYS_OFFSET UL(0x80000000) #else -#error "Invalid Tegra SoC family selection" +#define PHYS_OFFSET UL(0x80000000) #endif /* diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h index 83b420403e78..8420199d88a9 100644 --- a/arch/arm/mach-tegra/include/mach/pinmux.h +++ b/arch/arm/mach-tegra/include/mach/pinmux.h @@ -99,7 +99,7 @@ enum tegra_mux_func { TEGRA_MUX_VI, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_MUX_XIO, -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC TEGRA_MUX_BLINK, TEGRA_MUX_CEC, TEGRA_MUX_CLK12, @@ -192,7 +192,7 @@ enum tegra_vddio { TEGRA_VDDIO_SYS, TEGRA_VDDIO_AUDIO, TEGRA_VDDIO_SD, -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC TEGRA_VDDIO_CAM, TEGRA_VDDIO_GMI, TEGRA_VDDIO_PEXCTL, diff --git a/arch/arm/mach-tegra/iovmm-smmu.c b/arch/arm/mach-tegra/iovmm-smmu.c index 1b68ad104da4..4bf516638364 100644 --- a/arch/arm/mach-tegra/iovmm-smmu.c +++ b/arch/arm/mach-tegra/iovmm-smmu.c @@ -49,7 +49,7 @@ #define SMMU_VERBOSE 0 #endif -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC /* * ALL-CAP macros copied from armc.h */ diff --git a/arch/arm/mach-tegra/mc.c b/arch/arm/mach-tegra/mc.c index 53074ce3dc06..57b2f6f4e223 100644 --- a/arch/arm/mach-tegra/mc.c +++ b/arch/arm/mach-tegra/mc.c @@ -42,6 +42,6 @@ void tegra_mc_set_priority(unsigned long client, unsigned long prio) spin_unlock_irqrestore(&tegra_mc_lock, flags); } -#elif defined(CONFIG_ARCH_TEGRA_3x_SOC) +#else /* !!!FIXME!!! IMPLEMENT ME */ #endif diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c index e3727e3375b9..ed2c79abd77b 100644 --- a/arch/arm/mach-tegra/pinmux.c +++ b/arch/arm/mach-tegra/pinmux.c @@ -96,7 +96,7 @@ static char *tegra_mux_names[TEGRA_MAX_MUX] = { [TEGRA_MUX_VI] = "VI", [TEGRA_MUX_VI_SENSOR_CLK] = "VI_SENSOR_CLK", [TEGRA_MUX_XIO] = "XIO", -#if defined(CONFIG_ARCH_TEGRA_3x_SOC) +#ifndef CONFIG_ARCH_TEGRA_2x_SOC [TEGRA_MUX_BLINK] = "BLINK", [TEGRA_MUX_CEC] = "CEC", [TEGRA_MUX_CLK12] = "CLK12", diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index a62470468802..a208041ba966 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -439,7 +439,7 @@ static unsigned int available_cpus(void) if (ncores == 0) { ncores = scu_get_core_count(scu_base); -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC if (ncores > 1) { u32 fuse_sku = readl(FUSE_SKU_DIRECT_CONFIG); ncores -= FUSE_SKU_NUM_DISABLED_CPUS(fuse_sku); diff --git a/arch/arm/mach-tegra/spi_tegra_slave.c b/arch/arm/mach-tegra/spi_tegra_slave.c index 6086c5598860..a25813241c42 100644 --- a/arch/arm/mach-tegra/spi_tegra_slave.c +++ b/arch/arm/mach-tegra/spi_tegra_slave.c @@ -145,7 +145,7 @@ static const unsigned long spi_tegra_req_sels[] = { TEGRA_DMA_REQ_SEL_SL2B2, TEGRA_DMA_REQ_SEL_SL2B3, TEGRA_DMA_REQ_SEL_SL2B4, -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC TEGRA_DMA_REQ_SEL_SL2B5, TEGRA_DMA_REQ_SEL_SL2B6, #endif diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c index 8a1810b9a0db..6c35402666cc 100644 --- a/arch/arm/mach-tegra/suspend.c +++ b/arch/arm/mach-tegra/suspend.c @@ -164,7 +164,7 @@ unsigned long tegra_wfi_fail_count[CONFIG_NR_CPUS]; #define FLOW_CTRL_BITMAP_CPU0 (1<<8) /* CPU0 WFI bitmap */ #endif -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC #define PMC_SCRATCH4_WAKE_CLUSTER_MASK (1<<31) #endif @@ -664,7 +664,7 @@ void tegra_suspend_dram(bool do_lp0) if (!do_lp0) tegra_cpu_lp1_map = 1; else { -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC reg = readl(pmc + PMC_SCRATCH4); if (is_lp_cluster()) reg |= PMC_SCRATCH4_WAKE_CLUSTER_MASK; diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 683ebe9a1cc8..9490aadfb91c 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -188,7 +188,7 @@ #define UHSIC_CONNECT_DETECT (1 << 0) -#else /* T30 definitions */ +#else #define USB_USBCMD 0x130 #define USB_USBCMD_RS (1 << 0) @@ -882,7 +882,7 @@ static void utmi_phy_power_off(struct tegra_usb_phy *phy, bool is_dpd) UTMIP_FORCE_PDDR_POWERDOWN; writel(val, base + UTMIP_XCVR_CFG1); -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC val = readl(base + UTMIP_BIAS_CFG1); val |= UTMIP_BIAS_PDTRK_COUNT(0x5); writel(val, base + UTMIP_BIAS_CFG1); @@ -983,7 +983,7 @@ static void utmi_phy_restore_end(struct tegra_usb_phy *phy) static void ulpi_set_tristate(bool enable) { -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC int tristate = (enable)? TEGRA_TRI_TRISTATE : TEGRA_TRI_NORMAL; tegra_pinmux_set_tristate(TEGRA_PINGROUP_ULPI_DATA0, tristate); @@ -1005,7 +1005,7 @@ static void ulpi_phy_reset(void __iomem *base) { unsigned long val; -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC tegra_pinmux_set_tristate(TEGRA_PINGROUP_ULPI_CLK, TEGRA_TRI_TRISTATE); #endif val = readl(base + USB_SUSP_CTRL); @@ -1572,7 +1572,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs, phy->ulpi = otg_ulpi_create(&ulpi_viewport_access_ops, 0); phy->ulpi->io_priv = regs + ULPI_VIEWPORT; } -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC else if (phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC) { ulpi_config = config; gpio_request(ulpi_config->enable_gpio, @@ -1613,7 +1613,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs, } } -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC /* Power-up the VBUS detector for UTMIP PHY */ if (phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) { writel(readl((IO_ADDRESS(TEGRA_PMC_BASE) + TEGRA_PMC_USB_AO)) & @@ -1782,7 +1782,7 @@ int tegra_usb_phy_bus_connect(struct tegra_usb_phy *phy) void __iomem *base = phy->regs; if (phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC) { -#ifdef CONFIG_ARCH_TEGRA_3x_SOC +#ifndef CONFIG_ARCH_TEGRA_2x_SOC /* Change the USB controller PHY type to HSIC */ val = readl(base + HOSTPC1_DEVLC); val &= ~HOSTPC1_DEVLC_PTS(HOSTPC1_DEVLC_PTS_MASK); |