diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-16 10:19:00 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-02-24 12:03:55 +0000 |
| commit | 04cec1a2bc5c70e719c1da8eaca2842da4cd77fb (patch) | |
| tree | e8a7b99ad3d8bab80cd6059c540cb821b2b88349 /arch/arm | |
| parent | 0721feeee09bdb1ea97b75948f2ab2861d9ee38e (diff) | |
imx-drm: add imx6 DT configuration for HDMI
Extracted from another patch by Fabio Estevam, this adds the DT
configuration for HDMI output on the IMX6 SoCs
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 10 |
3 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 9e8ae118fdd4..65e54b4529c5 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -88,3 +88,7 @@ crtcs = <&ipu1 0>, <&ipu1 1>; }; }; + +&hdmi { + crtcs = <&ipu1 0>, <&ipu1 1>; +} diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f024ef28b34b..d2467f532de6 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -159,3 +159,7 @@ crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>; }; }; + +&hdmi { + crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>; +}; diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index fb28b2ecb1db..400bbc624f25 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -1368,6 +1368,16 @@ }; }; + hdmi: hdmi@0120000 { + compatible = "fsl,imx6q-hdmi"; + reg = <0x00120000 0x9000>; + interrupts = <0 115 0x04>; + gpr = <&gpr>; + clocks = <&clks 123>, <&clks 124>; + clock-names = "iahb", "isfr"; + status = "disabled"; + }; + dcic1: dcic@020e4000 { reg = <0x020e4000 0x4000>; interrupts = <0 124 0x04>; |