diff options
| author | Sivaram Nair <sivaramn@nvidia.com> | 2013-02-01 11:39:10 +0200 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:57:10 -0700 |
| commit | 8faeddc6c8b69e31654bc5307f728d60e3e4765e (patch) | |
| tree | e93a4aa41adec0e463081691ce7860d919d8a578 /arch/arm | |
| parent | 7e63b6a7d506c25bb55673b583ff9f7dd6ae4fcd (diff) | |
ARM: tegra11: add frequency cap clocks
Frequency cap clocks for EMC and CBUS are added for AP+DRAM EDP
super-client support.
Bug 1159974
Change-Id: I72d3c716c5c916e3ecca47b5124cddae3a7bf719
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/196387
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/tegra11_clocks.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra11_clocks.c b/arch/arm/mach-tegra/tegra11_clocks.c index 47c6c6773b24..ad7c03aa44ab 100644 --- a/arch/arm/mach-tegra/tegra11_clocks.c +++ b/arch/arm/mach-tegra/tegra11_clocks.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/tegra11_clocks.c * - * Copyright (C) 2011-2012 NVIDIA Corporation + * Copyright (C) 2011-2013 NVIDIA Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -6613,6 +6613,7 @@ struct clk tegra_list_clks[] = { SHARED_CLK("floor.emc", "floor.emc", NULL, &tegra_clk_emc, NULL, 0, 0), SHARED_CLK("override.emc", "override.emc", NULL, &tegra_clk_emc, NULL, 0, SHARED_OVERRIDE), SHARED_CLK("edp.emc", "edp.emc", NULL, &tegra_clk_emc, NULL, 0, SHARED_CEILING), + SHARED_CLK("battery.emc", "battery_edp", "emc", &tegra_clk_emc, NULL, 0, SHARED_CEILING), #ifdef CONFIG_TEGRA_DUAL_CBUS DUAL_CBUS_CLK("3d.cbus", "tegra_gr3d", "gr3d", &tegra_clk_c2bus, "3d", 0, 0), @@ -6623,6 +6624,7 @@ struct clk tegra_list_clks[] = { SHARED_CLK("floor.c2bus", "floor.c2bus", NULL, &tegra_clk_c2bus, NULL, 0, 0), SHARED_CLK("override.c2bus", "override.c2bus", NULL, &tegra_clk_c2bus, NULL, 0, SHARED_OVERRIDE), SHARED_CLK("edp.c2bus", "edp.c2bus", NULL, &tegra_clk_c2bus, NULL, 0, SHARED_CEILING), + SHARED_CLK("battery.c2bus", "battery_edp", "gpu", &tegra_clk_c2bus, NULL, 0, SHARED_CEILING), DUAL_CBUS_CLK("msenc.cbus", "tegra_msenc", "msenc", &tegra_clk_c3bus, "msenc", 0, 0), DUAL_CBUS_CLK("tsec.cbus", "tegra_tsec", "tsec", &tegra_clk_c3bus, "tsec", 0, 0), @@ -6645,6 +6647,7 @@ struct clk tegra_list_clks[] = { SHARED_CLK("floor.cbus", "floor.cbus", NULL, &tegra_clk_cbus, NULL, 0, 0), SHARED_CLK("override.cbus", "override.cbus", NULL, &tegra_clk_cbus, NULL, 0, SHARED_OVERRIDE), SHARED_CLK("edp.cbus", "edp.cbus", NULL, &tegra_clk_cbus, NULL, 0, SHARED_CEILING), + SHARED_CLK("battery.cbus", "battery_edp", "gpu", &tegra_clk_cbus, NULL, 0, SHARED_CEILING), #endif }; |