arm: tegra: la: program bbc ptsa dynamically

program bbc ptsa dynamically based on bw requested for BBCR and BBCW
add sysfs nodes to disable display, bbc ptsa's.
Bug 1322650

Change-Id: I8dbb9445c1fa9ca32072c77a9193164925aaa8da
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/272179
(cherry picked from commit 0ec1afbc0d38fbbe3a86542169f137d6c4241ae3)
Reviewed-on: http://git-master/r/294241
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>

3 files changed, 47 insertions, 22 deletions

diff --git a/arch/arm/mach-tegra/la_priv.h b/arch/arm/mach-tegra/la_priv.h
index 78b34fed2d34..6a4cb6650c93 100644
--- a/arch/arm/mach-tegra/la_priv.h
+++ b/arch/arm/mach-tegra/la_priv.h
@@ -184,6 +184,7 @@ struct la_chip_specific {
 	unsigned int ispa_read_bw;
 	unsigned int ispa_write_bw;
 	unsigned int ispb_write_bw;
+	unsigned int bbc_bw_array[ID(BBCLLR) - ID(BBCR) + 1];
 	struct la_scaling_info scaling_info[ID(MAX_ID)];
 	int la_scaling_enable_count;
 	struct dentry *latency_debug_dir;
@@ -191,6 +192,8 @@ struct la_chip_specific {
 	bool disable_la;
 	bool disable_ptsa;
 	struct la_to_dc_params la_params;
+	bool disable_disp_ptsa;
+	bool disable_bbc_ptsa;
 
 	void (*init_ptsa)(void);
 	void (*update_display_ptsa_rate)(unsigned int *disp_bw_array);
diff --git a/arch/arm/mach-tegra/latency_allowance.c b/arch/arm/mach-tegra/latency_allowance.c
index 2052aa770ac4..a09e87ac575b 100644
--- a/arch/arm/mach-tegra/latency_allowance.c
+++ b/arch/arm/mach-tegra/latency_allowance.c
@@ -41,8 +41,12 @@
 static int default_set_la(enum tegra_la_id id, unsigned int bw_mbps);
 
 static struct la_chip_specific cs;
-module_param_named(disable_la, cs.disable_la, bool, 0644);
-module_param_named(disable_ptsa, cs.disable_ptsa, bool, 0644);
+module_param_named(disable_la, cs.disable_la, bool, S_IRUGO | S_IWUSR);
+module_param_named(disable_ptsa, cs.disable_ptsa, bool, S_IRUGO | S_IWUSR);
+module_param_named(disable_disp_ptsa,
+	cs.disable_disp_ptsa, bool, S_IRUGO | S_IWUSR);
+module_param_named(disable_bbc_ptsa,
+	cs.disable_bbc_ptsa, bool, S_IRUGO | S_IWUSR);
 
 /* FIXME!!:- This function needs to be implemented properly. */
 unsigned int tegra_get_dvfs_time_nsec(unsigned long emc_freq_mhz)
diff --git a/arch/arm/mach-tegra/tegra14x_la.c b/arch/arm/mach-tegra/tegra14x_la.c
index f2746ba82654..f84c9eb7f329 100644
--- a/arch/arm/mach-tegra/tegra14x_la.c
+++ b/arch/arm/mach-tegra/tegra14x_la.c
@@ -329,6 +329,19 @@ static void save_ptsa(void)
 	p->heg_extra_snap_level = readl(T14X_MC_RA(HEG_EXTRA_SNAP_LEVELS_0));
 }
 
+static void program_ring1_ptsa(struct ptsa_info *p)
+{
+	p->ring1_ptsa_rate = p->dis_ptsa_rate +
+			     p->bbc_ptsa_rate;
+#if defined(CONFIG_TEGRA_ERRATA_977223)
+	p->ring1_ptsa_rate /= 2;
+#endif
+	p->ring1_ptsa_rate += p->disb_ptsa_rate +
+			      p->ve_ptsa_rate +
+			      p->ring2_ptsa_rate;
+	writel(p->ring1_ptsa_rate, T14X_MC_RA(RING1_PTSA_RATE_0));
+}
+
 static void t14x_init_ptsa(void)
 {
 	struct ptsa_info *p = &cs->ptsa_info;
@@ -390,14 +403,7 @@ static void t14x_init_ptsa(void)
 	p->bbcll_earb_cfg = 0xd << 24 | 0x3f << 16 |
 		t14x_get_ptsa_rate(T14X_MAX_BBCLL_BW_MHZ) << 8 | 8 << 0;
 
-	p->ring1_ptsa_rate = p->dis_ptsa_rate +
-			     p->bbc_ptsa_rate;
-#if defined(CONFIG_TEGRA_ERRATA_977223)
-	p->ring1_ptsa_rate /= 2;
-#endif
-	p->ring1_ptsa_rate += p->disb_ptsa_rate +
-			      p->ve_ptsa_rate +
-			      p->ring2_ptsa_rate;
+	program_ring1_ptsa(p);
 	program_ptsa();
 }
 
@@ -408,7 +414,7 @@ static void t14x_update_display_ptsa_rate(unsigned int *disp_bw_array)
 	unsigned int total_disb_bw;
 	struct ptsa_info *p = &cs->ptsa_info;
 
-	if (cs->disable_ptsa)
+	if (cs->disable_ptsa || cs->disable_disp_ptsa)
 		return;
 	total_dis_bw = disp_bw_array[ID_IDX(DISPLAY_0A)] +
 			disp_bw_array[ID_IDX(DISPLAY_0B)] +
@@ -425,14 +431,23 @@ static void t14x_update_display_ptsa_rate(unsigned int *disp_bw_array)
 	writel(p->dis_ptsa_rate, T14X_MC_RA(DIS_PTSA_RATE_0));
 	writel(p->disb_ptsa_rate, T14X_MC_RA(DISB_PTSA_RATE_0));
 
-	p->ring1_ptsa_rate = p->dis_ptsa_rate + p->bbc_ptsa_rate;
-#if defined(CONFIG_TEGRA_ERRATA_977223)
-	p->ring1_ptsa_rate /= 2;
-#endif
-	p->ring1_ptsa_rate += p->disb_ptsa_rate +
-			      p->ve_ptsa_rate +
-			      p->ring2_ptsa_rate;
-	writel(p->ring1_ptsa_rate, T14X_MC_RA(RING1_PTSA_RATE_0));
+	program_ring1_ptsa(p);
+}
+
+#define BBC_ID_IDX(x) (ID(x) - ID(BBCR))
+static void t14x_update_bbc_ptsa_rate(uint *bbc_bw_array)
+{
+	uint total_bbc_bw;
+	struct ptsa_info *p = &cs->ptsa_info;
+
+	if (cs->disable_ptsa || cs->disable_bbc_ptsa)
+		return;
+
+	total_bbc_bw = bbc_bw_array[BBC_ID_IDX(BBCR)] +
+		       bbc_bw_array[BBC_ID_IDX(BBCW)];
+	p->bbc_ptsa_rate = t14x_get_ptsa_rate(total_bbc_bw);
+	writel(p->bbc_ptsa_rate, T14X_MC_RA(BBC_PTSA_RATE_0));
+	program_ring1_ptsa(p);
 }
 
 static void program_la(struct la_client_info *ci, int la)
@@ -488,14 +503,17 @@ static int t14x_set_la(enum tegra_la_id id, unsigned int bw_mbps)
 	ci = &cs->la_info_array[idx];
 	fifo_size_in_atoms = ci->fifo_size_in_atoms;
 
+	if (id == TEGRA_LA_BBCR || id == TEGRA_LA_BBCW) {
+		cs->bbc_bw_array[id - TEGRA_LA_BBCR] = bw_mbps;
+		t14x_update_bbc_ptsa_rate(cs->bbc_bw_array);
 #ifdef CONFIG_TEGRA_DISABLE_BBC_LATENCY_ALLOWANCE
-	if (id == TEGRA_LA_BBCR || id == TEGRA_LA_BBCW)
 		return 0;
 #endif
+	}
+
 	if (id >= TEGRA_LA_DISPLAY_0A && id <= TEGRA_LA_DISPLAYD) {
 		cs->disp_bw_array[id - TEGRA_LA_DISPLAY_0A] = bw_mbps;
-		if (cs->update_display_ptsa_rate)
-			cs->update_display_ptsa_rate(cs->disp_bw_array);
+		t14x_update_display_ptsa_rate(cs->disp_bw_array);
 	}
 
 	if (bw_mbps == 0) {