Merge remote-tracking branch 'fsl-linux-sdk/imx_3.0.35_4.0.0' into imx_3.0.35_android

Conflicts:
	arch/arm/mach-mx6/board-mx6q_hdmidongle.c
	drivers/input/touchscreen/egalax_ts.c

5 files changed, 118 insertions, 90 deletions

diff --git a/arch/arm/configs/imx6_defconfig b/arch/arm/configs/imx6_defconfig
index 13a4ef171e2e..5ad4a002676d 100644
--- a/arch/arm/configs/imx6_defconfig
+++ b/arch/arm/configs/imx6_defconfig
@@ -301,7 +301,6 @@ CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y
 # CONFIG_ARCH_MX503 is not set
 # CONFIG_ARCH_MX51 is not set
 CONFIG_ARCH_MX6=y
-# CONFIG_MACH_IMX_BLUETOOTH_RFKILL is not set
 CONFIG_ARCH_MX6Q=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_SOC_IMX6Q=y
@@ -754,8 +753,8 @@ CONFIG_MTD_CFI_UTIL=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-CONFIG_MTD_IMX6X_WEIMNOR=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -1101,7 +1100,6 @@ CONFIG_TOUCHSCREEN_MAX11801=y
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
 # CONFIG_TOUCHSCREEN_WM97XX is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
-# CONFIG_TOUCHSCREEN_NOVATEK is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
 # CONFIG_TOUCHSCREEN_TSC2005 is not set
 # CONFIG_TOUCHSCREEN_TSC2007 is not set
@@ -1960,7 +1958,6 @@ CONFIG_USB_OTG=y
 #
 # CONFIG_USB_C67X00_HCD is not set
 CONFIG_USB_EHCI_HCD=y
-# CONFIG_FSL_USB_TEST_MODE is not set
 CONFIG_USB_EHCI_ARC=y
 CONFIG_USB_EHCI_ARC_OTG=y
 # CONFIG_USB_EHCI_ARC_HSIC is not set
diff --git a/arch/arm/mach-mx6/board-mx6q_hdmidongle.c b/arch/arm/mach-mx6/board-mx6q_hdmidongle.c
index 48ba8055e08c..e88383b339dd 100644
--- a/arch/arm/mach-mx6/board-mx6q_hdmidongle.c
+++ b/arch/arm/mach-mx6/board-mx6q_hdmidongle.c
@@ -100,7 +100,6 @@
 #define HDMIDONGLE_PCIE_RST 	IMX_GPIO_NR(3, 9)
 #define HDMIDONGLE_PCIE_WAKE	IMX_GPIO_NR(3, 22)
 #define HDMIDONGLE_PCIE_DIS		IMX_GPIO_NR(3, 10)
-static struct wake_lock pcie_wake_lock;
 #endif
 
 extern char *gp_reg_id;
@@ -629,8 +628,6 @@ static void __init mx6_hdmidongle_board_init(void)
 	} else if (board_is_mx6_revb() || board_is_mx6_revc()) {
 		/* Add PCIe RC interface support */
 		imx6q_add_pcie(&mx6_hdmidongle_pcie_data);
-		wake_lock_init(&pcie_wake_lock, WAKE_LOCK_SUSPEND, "pcie_workaround");
-		wake_lock(&pcie_wake_lock);
 #endif
 	}
 	pm_power_off = mx6_snvs_poweroff;
diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c
index 2700a249c20e..45f4af592ab9 100644
--- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c
+++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c
@@ -464,7 +464,6 @@ static struct spi_board_info m25p32_spi0_board_info[] __initdata = {
 		.platform_data	= &m25p32_spi_flash_data,
 	},
 };
-
 static void spi_device_init(void)
 {
 	spi_register_board_info(m25p32_spi0_board_info,
@@ -505,8 +504,8 @@ static struct physmap_flash_data nor_flash_data = {
 	.nr_parts	= ARRAY_SIZE(mxc_nor_partitions),
 };
 
-static struct platform_device imx6x_weimnor_device = {
-	.name	= "imx6x-weimnor",
+static struct platform_device physmap_flash_device = {
+	.name	= "physmap-flash",
 	.id	= 0,
 	.dev	= {
 		.platform_data = &nor_flash_data,
@@ -515,11 +514,12 @@ static struct platform_device imx6x_weimnor_device = {
 	.num_resources	= 1,
 };
 
+/* These registers settings are just valid for Numonyx M29W256GL7AN6E. */
 static void mx6q_setup_weimcs(void)
 {
-	unsigned int reg;
 	void __iomem *nor_reg = MX6_IO_ADDRESS(WEIM_BASE_ADDR);
 	void __iomem *ccm_reg = MX6_IO_ADDRESS(CCM_BASE_ADDR);
+	unsigned int reg;
 	struct clk *clk;
 	u32 rate;
 
@@ -539,26 +539,53 @@ static void mx6q_setup_weimcs(void)
 		printk(KERN_ERR "Warning: emi_slow_clk not set to 132 MHz!"
 		       " WEIM NOR timing may be incorrect!\n");
 
-	/* EIM_CS0GCR1: 16-bit port on DATA[31:16],  Burst Length 8 words,
-	   Chip select enable is set */
-	__raw_writel(0x00020181, nor_reg);
-
-	/* EIM_CS0GCR2: Address hold time is set to cycle after ADV negation */
-	__raw_writel(0x00000001, nor_reg + 0x00000004);
-
-	/* EIM_CS0RCR1: RWSC = 9 EIM Clocks, ADV Negation = 2 EIM Clocks,
-	   OE Assertion = 2 EIM Clocks */
-	__raw_writel(0x0a022000, nor_reg + 0x00000008);
-
-	/* EIM_CS0RCR2: APR = Page read enabled, PAT = 4 EIM Clocks */
-	__raw_writel(0x0000c000, nor_reg + 0x0000000c);
+	/*
+	 * For EIM General Configuration registers.
+	 *
+	 * CS0GCR1:
+	 *	GBC = 0; CSREC = 6; DSZ = 2; BL = 0;
+	 *	CREP = 1; CSEN = 1;
+	 *
+	 *	EIM Operation Mode: MUM = SRD = SWR = 0.
+	 *		(Async write/Async page read, none multiplexed)
+	 *
+	 * CS0GCR2:
+	 *	ADH = 1
+	 */
+	writel(0x00620081, nor_reg);
+	writel(0x00000001, nor_reg + 0x00000004);
 
-	/* EIM_CS0WCR1: WWSC = 8 EIM Clocks, WADVN = 1,  WBEA = 1, WBEN = 1,
-	   WEA = 1, WEN = 1  */
-	__raw_writel(0x0804a240, nor_reg + 0x00000010);
+	/*
+	 * For EIM Read Configuration registers.
+	 *
+	 * CS0RCR1:
+	 *	RWSC = 1C;
+	 *	RADVA = 0; RADVN = 2;
+	 *	OEA = 2; OEN = 0;
+	 *	RCSA = 0; RCSN = 0
+	 *
+	 * CS0RCR2:
+	 *	APR = 1 (Async Page Read);
+	 *	PAT = 4 (6 EIM clock sycles)
+	 */
+	writel(0x1C022000, nor_reg + 0x00000008);
+	writel(0x0000C000, nor_reg + 0x0000000C);
 
-	/* EIM_WCR: WDOG_EN = 1, INTPOL = 1  */
-	__raw_writel(0x00000120, nor_reg + 0x00000090);
+	/*
+	 * For EIM Write Configuration registers.
+	 *
+	 * CS0WCR1:
+	 *	WWSC = 20;
+	 *	WADVA = 0; WADVN = 1;
+	 *	WBEA = 1; WBEN = 2;
+	 *	WEA = 1; WEN = 6;
+	 *	WCSA = 1; WCSN = 2;
+	 *
+	 * CS0WCR2:
+	 *	WBCDD = 0
+	 */
+	writel(0x1404a38e, nor_reg + 0x00000010);
+	writel(0x00000000, nor_reg + 0x00000014);
 }
 
 static int max7310_1_setup(struct i2c_client *client,
@@ -703,6 +730,12 @@ static struct fsl_mxc_tvin_platform_data adv7180_data = {
 	.io_init	= mx6q_csi0_io_init,
 };
 
+static void mx6q_mipi_csi1_io_init(void)
+{
+	if (cpu_is_mx6dl())
+		mxc_iomux_set_gpr_register(13, 3, 3, 1);
+}
+
 static struct fsl_mxc_tvin_platform_data adv7280_data = {
 	.dvddio_reg	= NULL,
 	.dvdd_reg	= NULL,
@@ -710,8 +743,9 @@ static struct fsl_mxc_tvin_platform_data adv7280_data = {
 	.pvdd_reg	= NULL,
 	.pwdn		= NULL,
 	.cvbs		= true,
+	.io_init    = mx6q_mipi_csi1_io_init,
 	/* csi slave reg address */
-	.csi_tx_addr = 0x51,
+	.csi_tx_addr = 0x52,
 };
 
 static struct imxi2c_platform_data mx6q_sabreauto_i2c2_data = {
@@ -1074,10 +1108,10 @@ static struct fsl_mxc_ldb_platform_data ldb_data = {
 static struct imx_ipuv3_platform_data ipu_data[] = {
 	{
 		.rev		= 4,
-		.csi_clk[0]	= "ccm_clk0",
+		.csi_clk[0]	= "clko_clk",
 	}, {
 		.rev		= 4,
-		.csi_clk[0]	= "ccm_clk0",
+		.csi_clk[0]	= "clko_clk",
 	},
 };
 
@@ -1161,9 +1195,9 @@ static const struct flexcan_platform_data
 
 static struct mipi_csi2_platform_data mipi_csi2_pdata = {
 	.ipu_id		= 0,
-	.csi_id		= 0,
-	.v_channel	= 0,
-	.lanes		= 2,
+	.csi_id		= 1,
+	.v_channel	= 1,
+	.lanes		= 1,
 	.dphy_clk	= "mipi_pllref_clk",
 	.pixel_clk	= "emi_clk",
 };
@@ -1689,12 +1723,12 @@ static void __init mx6_board_init(void)
 	}
 	/* SPI */
 	imx6q_add_ecspi(0, &mx6q_sabreauto_spi_data);
-	if (spinor_en)
-		spi_device_init();
-	else if (weimnor_en) {
-		mx6q_setup_weimcs();
-		platform_device_register(&imx6x_weimnor_device);
-	}
+		if (spinor_en)
+			spi_device_init();
+		else if (weimnor_en) {
+			mx6q_setup_weimcs();
+			platform_device_register(&physmap_flash_device);
+		}
 	imx6q_add_mxc_hdmi(&hdmi_data);
 
 	imx6q_add_anatop_thermal_imx(1, &mx6q_sabreauto_anatop_thermal_data);
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h b/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
index cfda6e768e78..dbfc9a2d8012 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
@@ -1262,7 +1262,7 @@
 		IOMUX_PAD(0x04DC, NO_MUX_I, 0, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A16__WEIM_WEIM_A_16                                      \
-		IOMUX_PAD(0x04E0, 0x0110, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04E0, 0x0110, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A16__IPU1_DI1_DISP_CLK                                   \
 		IOMUX_PAD(0x04E0, 0x0110, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A16__IPU1_CSI1_PIXCLK                                    \
@@ -1279,7 +1279,7 @@
 		IOMUX_PAD(0x04E0, 0x0110, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A17__WEIM_WEIM_A_17                                      \
-		IOMUX_PAD(0x04E4, 0x0114, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04E4, 0x0114, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A17__IPU1_DISP1_DAT_12                                   \
 		IOMUX_PAD(0x04E4, 0x0114, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A17__IPU1_CSI1_D_12                                      \
@@ -1296,7 +1296,7 @@
 		IOMUX_PAD(0x04E4, 0x0114, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A18__WEIM_WEIM_A_18                                      \
-		IOMUX_PAD(0x04E8, 0x0118, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04E8, 0x0118, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A18__IPU1_DISP1_DAT_13                                   \
 		IOMUX_PAD(0x04E8, 0x0118, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A18__IPU1_CSI1_D_13                                      \
@@ -1313,7 +1313,7 @@
 		IOMUX_PAD(0x04E8, 0x0118, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A19__WEIM_WEIM_A_19                                      \
-		IOMUX_PAD(0x04EC, 0x011C, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04EC, 0x011C, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A19__IPU1_DISP1_DAT_14                                   \
 		IOMUX_PAD(0x04EC, 0x011C, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A19__IPU1_CSI1_D_14                                      \
@@ -1330,7 +1330,7 @@
 		IOMUX_PAD(0x04EC, 0x011C, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A20__WEIM_WEIM_A_20                                      \
-		IOMUX_PAD(0x04F0, 0x0120, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04F0, 0x0120, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A20__IPU1_DISP1_DAT_15                                   \
 		IOMUX_PAD(0x04F0, 0x0120, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A20__IPU1_CSI1_D_15                                      \
@@ -1347,7 +1347,7 @@
 		IOMUX_PAD(0x04F0, 0x0120, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A21__WEIM_WEIM_A_21                                      \
-		IOMUX_PAD(0x04F4, 0x0124, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04F4, 0x0124, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A21__IPU1_DISP1_DAT_16                                   \
 		IOMUX_PAD(0x04F4, 0x0124, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A21__IPU1_CSI1_D_16                                      \
@@ -1364,7 +1364,7 @@
 		IOMUX_PAD(0x04F4, 0x0124, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A22__WEIM_WEIM_A_22                                      \
-		IOMUX_PAD(0x04F8, 0x0128, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04F8, 0x0128, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A22__IPU1_DISP1_DAT_17                                   \
 		IOMUX_PAD(0x04F8, 0x0128, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A22__IPU1_CSI1_D_17                                      \
@@ -1379,7 +1379,7 @@
 		IOMUX_PAD(0x04F8, 0x0128, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_A23__WEIM_WEIM_A_23                                      \
-		IOMUX_PAD(0x04FC, 0x012C, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x04FC, 0x012C, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_A23__IPU1_DISP1_DAT_18                                   \
 		IOMUX_PAD(0x04FC, 0x012C, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_A23__IPU1_CSI1_D_18                                      \
@@ -1797,7 +1797,7 @@
 		IOMUX_PAD(0x0550, 0x0180, 9, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA0__WEIM_WEIM_DA_A_0                                    \
-		IOMUX_PAD(0x0554, 0x0184, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0554, 0x0184, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA0__IPU1_DISP1_DAT_9                                    \
 		IOMUX_PAD(0x0554, 0x0184, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA0__IPU1_CSI1_D_9                                       \
@@ -1814,7 +1814,7 @@
 		IOMUX_PAD(0x0554, 0x0184, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA1__WEIM_WEIM_DA_A_1                                    \
-		IOMUX_PAD(0x0558, 0x0188, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0558, 0x0188, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA1__IPU1_DISP1_DAT_8                                    \
 		IOMUX_PAD(0x0558, 0x0188, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA1__IPU1_CSI1_D_8                                       \
@@ -1833,7 +1833,7 @@
 		IOMUX_PAD(0x0558, 0x0188, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA10__WEIM_WEIM_DA_A_10                                  \
-		IOMUX_PAD(0x055C, 0x018C, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x055C, 0x018C, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA10__IPU1_DI1_PIN15                                     \
 		IOMUX_PAD(0x055C, 0x018C, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA10__IPU1_CSI1_DATA_EN                                  \
@@ -1850,7 +1850,7 @@
 		IOMUX_PAD(0x055C, 0x018C, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA11__WEIM_WEIM_DA_A_11                                  \
-		IOMUX_PAD(0x0560, 0x0190, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0560, 0x0190, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA11__IPU1_DI1_PIN2                                      \
 		IOMUX_PAD(0x0560, 0x0190, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA11__IPU1_CSI1_HSYNC                                    \
@@ -1869,7 +1869,7 @@
 		IOMUX_PAD(0x0560, 0x0190, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA12__WEIM_WEIM_DA_A_12                                  \
-		IOMUX_PAD(0x0564, 0x0194, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0564, 0x0194, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA12__IPU1_DI1_PIN3                                      \
 		IOMUX_PAD(0x0564, 0x0194, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA12__IPU1_CSI1_VSYNC                                    \
@@ -1888,7 +1888,7 @@
 		IOMUX_PAD(0x0564, 0x0194, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA13__WEIM_WEIM_DA_A_13                                  \
-		IOMUX_PAD(0x0568, 0x0198, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0568, 0x0198, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA13__IPU1_DI1_D0_CS                                     \
 		IOMUX_PAD(0x0568, 0x0198, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA13__CCM_DI1_EXT_CLK                                    \
@@ -1907,7 +1907,7 @@
 		IOMUX_PAD(0x0568, 0x0198, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA14__WEIM_WEIM_DA_A_14                                  \
-		IOMUX_PAD(0x056C, 0x019C, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x056C, 0x019C, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA14__IPU1_DI1_D1_CS                                     \
 		IOMUX_PAD(0x056C, 0x019C, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA14__CCM_DI0_EXT_CLK                                    \
@@ -1926,7 +1926,7 @@
 		IOMUX_PAD(0x056C, 0x019C, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA15__WEIM_WEIM_DA_A_15                                  \
-		IOMUX_PAD(0x0570, 0x01A0, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0570, 0x01A0, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA15__IPU1_DI1_PIN1                                      \
 		IOMUX_PAD(0x0570, 0x01A0, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA15__IPU1_DI1_PIN4                                      \
@@ -1943,7 +1943,7 @@
 		IOMUX_PAD(0x0570, 0x01A0, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA2__WEIM_WEIM_DA_A_2                                    \
-		IOMUX_PAD(0x0574, 0x01A4, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0574, 0x01A4, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA2__IPU1_DISP1_DAT_7                                    \
 		IOMUX_PAD(0x0574, 0x01A4, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA2__IPU1_CSI1_D_7                                       \
@@ -1962,7 +1962,7 @@
 		IOMUX_PAD(0x0574, 0x01A4, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA3__WEIM_WEIM_DA_A_3                                    \
-		IOMUX_PAD(0x0578, 0x01A8, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0578, 0x01A8, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA3__IPU1_DISP1_DAT_6                                    \
 		IOMUX_PAD(0x0578, 0x01A8, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA3__IPU1_CSI1_D_6                                       \
@@ -1981,7 +1981,7 @@
 		IOMUX_PAD(0x0578, 0x01A8, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA4__WEIM_WEIM_DA_A_4                                    \
-		IOMUX_PAD(0x057C, 0x01AC, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x057C, 0x01AC, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA4__IPU1_DISP1_DAT_5                                    \
 		IOMUX_PAD(0x057C, 0x01AC, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA4__IPU1_CSI1_D_5                                       \
@@ -2000,7 +2000,7 @@
 		IOMUX_PAD(0x057C, 0x01AC, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA5__WEIM_WEIM_DA_A_5                                    \
-		IOMUX_PAD(0x0580, 0x01B0, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0580, 0x01B0, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA5__IPU1_DISP1_DAT_4                                    \
 		IOMUX_PAD(0x0580, 0x01B0, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA5__IPU1_CSI1_D_4                                       \
@@ -2019,7 +2019,7 @@
 		IOMUX_PAD(0x0580, 0x01B0, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA6__WEIM_WEIM_DA_A_6                                    \
-		IOMUX_PAD(0x0584, 0x01B4, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0584, 0x01B4, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA6__IPU1_DISP1_DAT_3                                    \
 		IOMUX_PAD(0x0584, 0x01B4, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA6__IPU1_CSI1_D_3                                       \
@@ -2038,7 +2038,7 @@
 		IOMUX_PAD(0x0584, 0x01B4, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA7__WEIM_WEIM_DA_A_7                                    \
-		IOMUX_PAD(0x0588, 0x01B8, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0588, 0x01B8, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA7__IPU1_DISP1_DAT_2                                    \
 		IOMUX_PAD(0x0588, 0x01B8, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA7__IPU1_CSI1_D_2                                       \
@@ -2055,7 +2055,7 @@
 		IOMUX_PAD(0x0588, 0x01B8, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA8__WEIM_WEIM_DA_A_8                                    \
-		IOMUX_PAD(0x058C, 0x01BC, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x058C, 0x01BC, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA8__IPU1_DISP1_DAT_1                                    \
 		IOMUX_PAD(0x058C, 0x01BC, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA8__IPU1_CSI1_D_1                                       \
@@ -2072,7 +2072,7 @@
 		IOMUX_PAD(0x058C, 0x01BC, 8, 0x0000, 0, NO_PAD_CTRL)
 
 #define MX6DL_PAD_EIM_DA9__WEIM_WEIM_DA_A_9                                    \
-		IOMUX_PAD(0x0590, 0x01C0, 0, 0x0000, 0, NO_PAD_CTRL)
+		IOMUX_PAD(0x0590, 0x01C0, 0, 0x0000, 0, MX6DL_WEIM_NOR_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA9__IPU1_DISP1_DAT_0                                    \
 		IOMUX_PAD(0x0590, 0x01C0, 1, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_EIM_DA9__IPU1_CSI1_D_0                                       \
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
index 36ae997d4db5..557fc4398cd1 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
@@ -4232,7 +4232,7 @@
 		(_MX6Q_PAD_EIM_A24__SRC_BT_CFG_24 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A23__WEIM_WEIM_A_23		\
-		(_MX6Q_PAD_EIM_A23__WEIM_WEIM_A_23 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A23__WEIM_WEIM_A_23 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A23__IPU1_DISP1_DAT_18		\
 		(_MX6Q_PAD_EIM_A23__IPU1_DISP1_DAT_18 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A23__IPU2_CSI1_D_18		\
@@ -4249,7 +4249,7 @@
 		(_MX6Q_PAD_EIM_A23__SRC_BT_CFG_23 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A22__WEIM_WEIM_A_22		\
-		(_MX6Q_PAD_EIM_A22__WEIM_WEIM_A_22 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A22__WEIM_WEIM_A_22 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A22__IPU1_DISP1_DAT_17		\
 		(_MX6Q_PAD_EIM_A22__IPU1_DISP1_DAT_17 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A22__IPU2_CSI1_D_17		\
@@ -4262,7 +4262,7 @@
 		(_MX6Q_PAD_EIM_A22__SRC_BT_CFG_22 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A21__WEIM_WEIM_A_21		\
-		(_MX6Q_PAD_EIM_A21__WEIM_WEIM_A_21 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A21__WEIM_WEIM_A_21 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A21__IPU1_DISP1_DAT_16		\
 		(_MX6Q_PAD_EIM_A21__IPU1_DISP1_DAT_16 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A21__IPU2_CSI1_D_16		\
@@ -4279,7 +4279,7 @@
 		(_MX6Q_PAD_EIM_A21__SRC_BT_CFG_21 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A20__WEIM_WEIM_A_20		\
-		(_MX6Q_PAD_EIM_A20__WEIM_WEIM_A_20 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A20__WEIM_WEIM_A_20 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A20__IPU1_DISP1_DAT_15		\
 		(_MX6Q_PAD_EIM_A20__IPU1_DISP1_DAT_15 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A20__IPU2_CSI1_D_15		\
@@ -4296,7 +4296,7 @@
 		(_MX6Q_PAD_EIM_A20__SRC_BT_CFG_20 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A19__WEIM_WEIM_A_19		\
-		(_MX6Q_PAD_EIM_A19__WEIM_WEIM_A_19 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A19__WEIM_WEIM_A_19 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A19__IPU1_DISP1_DAT_14		\
 		(_MX6Q_PAD_EIM_A19__IPU1_DISP1_DAT_14 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A19__IPU2_CSI1_D_14		\
@@ -4313,7 +4313,7 @@
 		(_MX6Q_PAD_EIM_A19__SRC_BT_CFG_19 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A18__WEIM_WEIM_A_18		\
-		(_MX6Q_PAD_EIM_A18__WEIM_WEIM_A_18 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A18__WEIM_WEIM_A_18 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A18__IPU1_DISP1_DAT_13		\
 		(_MX6Q_PAD_EIM_A18__IPU1_DISP1_DAT_13 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A18__IPU2_CSI1_D_13		\
@@ -4330,7 +4330,7 @@
 		(_MX6Q_PAD_EIM_A18__SRC_BT_CFG_18 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A17__WEIM_WEIM_A_17		\
-		(_MX6Q_PAD_EIM_A17__WEIM_WEIM_A_17 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A17__WEIM_WEIM_A_17 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A17__IPU1_DISP1_DAT_12		\
 		(_MX6Q_PAD_EIM_A17__IPU1_DISP1_DAT_12 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A17__IPU2_CSI1_D_12		\
@@ -4347,7 +4347,7 @@
 		(_MX6Q_PAD_EIM_A17__SRC_BT_CFG_17 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_A16__WEIM_WEIM_A_16		\
-		(_MX6Q_PAD_EIM_A16__WEIM_WEIM_A_16 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_A16__WEIM_WEIM_A_16 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A16__IPU1_DI1_DISP_CLK		\
 		(_MX6Q_PAD_EIM_A16__IPU1_DI1_DISP_CLK | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK		\
@@ -4461,7 +4461,7 @@
 		(_MX6Q_PAD_EIM_EB1__SRC_BT_CFG_28 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA0__WEIM_WEIM_DA_A_0		\
-		(_MX6Q_PAD_EIM_DA0__WEIM_WEIM_DA_A_0 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA0__WEIM_WEIM_DA_A_0 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA0__IPU1_DISP1_DAT_9		\
 		(_MX6Q_PAD_EIM_DA0__IPU1_DISP1_DAT_9 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA0__IPU2_CSI1_D_9		\
@@ -4476,7 +4476,7 @@
 		(_MX6Q_PAD_EIM_DA0__SRC_BT_CFG_0 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA1__WEIM_WEIM_DA_A_1		\
-		(_MX6Q_PAD_EIM_DA1__WEIM_WEIM_DA_A_1 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA1__WEIM_WEIM_DA_A_1 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA1__IPU1_DISP1_DAT_8		\
 		(_MX6Q_PAD_EIM_DA1__IPU1_DISP1_DAT_8 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA1__IPU2_CSI1_D_8		\
@@ -4493,7 +4493,7 @@
 		(_MX6Q_PAD_EIM_DA1__SRC_BT_CFG_1 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA2__WEIM_WEIM_DA_A_2		\
-		(_MX6Q_PAD_EIM_DA2__WEIM_WEIM_DA_A_2 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA2__WEIM_WEIM_DA_A_2 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA2__IPU1_DISP1_DAT_7		\
 		(_MX6Q_PAD_EIM_DA2__IPU1_DISP1_DAT_7 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA2__IPU2_CSI1_D_7		\
@@ -4510,7 +4510,7 @@
 		(_MX6Q_PAD_EIM_DA2__SRC_BT_CFG_2 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA3__WEIM_WEIM_DA_A_3		\
-		(_MX6Q_PAD_EIM_DA3__WEIM_WEIM_DA_A_3 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA3__WEIM_WEIM_DA_A_3 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA3__IPU1_DISP1_DAT_6		\
 		(_MX6Q_PAD_EIM_DA3__IPU1_DISP1_DAT_6 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA3__IPU2_CSI1_D_6		\
@@ -4527,7 +4527,7 @@
 		(_MX6Q_PAD_EIM_DA3__SRC_BT_CFG_3 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA4__WEIM_WEIM_DA_A_4		\
-		(_MX6Q_PAD_EIM_DA4__WEIM_WEIM_DA_A_4 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA4__WEIM_WEIM_DA_A_4 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA4__IPU1_DISP1_DAT_5		\
 		(_MX6Q_PAD_EIM_DA4__IPU1_DISP1_DAT_5 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA4__IPU2_CSI1_D_5		\
@@ -4544,7 +4544,7 @@
 		(_MX6Q_PAD_EIM_DA4__SRC_BT_CFG_4 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA5__WEIM_WEIM_DA_A_5		\
-		(_MX6Q_PAD_EIM_DA5__WEIM_WEIM_DA_A_5 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA5__WEIM_WEIM_DA_A_5 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA5__IPU1_DISP1_DAT_4		\
 		(_MX6Q_PAD_EIM_DA5__IPU1_DISP1_DAT_4 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA5__IPU2_CSI1_D_4		\
@@ -4561,7 +4561,7 @@
 		(_MX6Q_PAD_EIM_DA5__SRC_BT_CFG_5 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA6__WEIM_WEIM_DA_A_6		\
-		(_MX6Q_PAD_EIM_DA6__WEIM_WEIM_DA_A_6 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA6__WEIM_WEIM_DA_A_6 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA6__IPU1_DISP1_DAT_3		\
 		(_MX6Q_PAD_EIM_DA6__IPU1_DISP1_DAT_3 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA6__IPU2_CSI1_D_3		\
@@ -4578,7 +4578,7 @@
 		(_MX6Q_PAD_EIM_DA6__SRC_BT_CFG_6 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA7__WEIM_WEIM_DA_A_7		\
-		(_MX6Q_PAD_EIM_DA7__WEIM_WEIM_DA_A_7 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA7__WEIM_WEIM_DA_A_7 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA7__IPU1_DISP1_DAT_2		\
 		(_MX6Q_PAD_EIM_DA7__IPU1_DISP1_DAT_2 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA7__IPU2_CSI1_D_2		\
@@ -4593,7 +4593,7 @@
 		(_MX6Q_PAD_EIM_DA7__SRC_BT_CFG_7 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA8__WEIM_WEIM_DA_A_8		\
-		(_MX6Q_PAD_EIM_DA8__WEIM_WEIM_DA_A_8 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA8__WEIM_WEIM_DA_A_8 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA8__IPU1_DISP1_DAT_1		\
 		(_MX6Q_PAD_EIM_DA8__IPU1_DISP1_DAT_1 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA8__IPU2_CSI1_D_1		\
@@ -4608,7 +4608,7 @@
 		(_MX6Q_PAD_EIM_DA8__SRC_BT_CFG_8 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA9__WEIM_WEIM_DA_A_9		\
-		(_MX6Q_PAD_EIM_DA9__WEIM_WEIM_DA_A_9 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA9__WEIM_WEIM_DA_A_9 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA9__IPU1_DISP1_DAT_0		\
 		(_MX6Q_PAD_EIM_DA9__IPU1_DISP1_DAT_0 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA9__IPU2_CSI1_D_0		\
@@ -4623,7 +4623,7 @@
 		(_MX6Q_PAD_EIM_DA9__SRC_BT_CFG_9 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA10__WEIM_WEIM_DA_A_10		\
-		(_MX6Q_PAD_EIM_DA10__WEIM_WEIM_DA_A_10 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA10__WEIM_WEIM_DA_A_10 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA10__IPU1_DI1_PIN15		\
 		(_MX6Q_PAD_EIM_DA10__IPU1_DI1_PIN15 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA10__IPU2_CSI1_DATA_EN		\
@@ -4638,7 +4638,7 @@
 		(_MX6Q_PAD_EIM_DA10__SRC_BT_CFG_10 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA11__WEIM_WEIM_DA_A_11		\
-		(_MX6Q_PAD_EIM_DA11__WEIM_WEIM_DA_A_11 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA11__WEIM_WEIM_DA_A_11 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA11__IPU1_DI1_PIN2		\
 		(_MX6Q_PAD_EIM_DA11__IPU1_DI1_PIN2 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA11__IPU2_CSI1_HSYNC		\
@@ -4655,7 +4655,7 @@
 		(_MX6Q_PAD_EIM_DA11__SRC_BT_CFG_11 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA12__WEIM_WEIM_DA_A_12		\
-		(_MX6Q_PAD_EIM_DA12__WEIM_WEIM_DA_A_12 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA12__WEIM_WEIM_DA_A_12 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA12__IPU1_DI1_PIN3		\
 		(_MX6Q_PAD_EIM_DA12__IPU1_DI1_PIN3 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA12__IPU2_CSI1_VSYNC		\
@@ -4672,7 +4672,7 @@
 		(_MX6Q_PAD_EIM_DA12__SRC_BT_CFG_12 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA13__WEIM_WEIM_DA_A_13		\
-		(_MX6Q_PAD_EIM_DA13__WEIM_WEIM_DA_A_13 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA13__WEIM_WEIM_DA_A_13 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA13__IPU1_DI1_D0_CS		\
 		(_MX6Q_PAD_EIM_DA13__IPU1_DI1_D0_CS | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA13__CCM_DI1_EXT_CLK		\
@@ -4689,7 +4689,7 @@
 		(_MX6Q_PAD_EIM_DA13__SRC_BT_CFG_13 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA14__WEIM_WEIM_DA_A_14		\
-		(_MX6Q_PAD_EIM_DA14__WEIM_WEIM_DA_A_14 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA14__WEIM_WEIM_DA_A_14 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA14__IPU1_DI1_D1_CS		\
 		(_MX6Q_PAD_EIM_DA14__IPU1_DI1_D1_CS | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA14__CCM_DI0_EXT_CLK		\
@@ -4706,7 +4706,7 @@
 		(_MX6Q_PAD_EIM_DA14__SRC_BT_CFG_14 | MUX_PAD_CTRL(NO_PAD_CTRL))
 
 #define  MX6Q_PAD_EIM_DA15__WEIM_WEIM_DA_A_15		\
-		(_MX6Q_PAD_EIM_DA15__WEIM_WEIM_DA_A_15 | MUX_PAD_CTRL(NO_PAD_CTRL))
+		(_MX6Q_PAD_EIM_DA15__WEIM_WEIM_DA_A_15 | MUX_PAD_CTRL(MX6Q_WEIM_NOR_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN1		\
 		(_MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN1 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define  MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN4		\