diff options
| author | Timo Alho <talho@nvidia.com> | 2014-05-07 11:04:47 +0300 |
|---|---|---|
| committer | Mandar Padmawar <mpadmawar@nvidia.com> | 2014-05-08 22:45:47 -0700 |
| commit | 5e9e0e798b8285f4119de6cd316ba0924f9db88f (patch) | |
| tree | e4053b21a56c25ccec8a4c5bd4bb6c64c84045e4 /arch/arm | |
| parent | 584b60200b8bdcc895c8edacb94f48db5929f70a (diff) | |
sysedp: tn8: enable SW feedback for battery OC throttling
* Enable battery OC hardware throttling on E1971 platform
* Enable SW feedback loop on battery OC throttling on all TN8
platforms
Bug 1511092
Change-Id: Iedf95e6b139661d5577519728a0fa781b525a341
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/406349
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/board-ardbeg-power.c | 12 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/board-tn8-sysedp.c | 23 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra11_soctherm.c | 2 |
3 files changed, 33 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/board-ardbeg-power.c b/arch/arm/mach-tegra/board-ardbeg-power.c index 08ed22817cf2..e692bf5375ae 100644 --- a/arch/arm/mach-tegra/board-ardbeg-power.c +++ b/arch/arm/mach-tegra/board-ardbeg-power.c @@ -677,7 +677,10 @@ static struct soctherm_platform_data t132ref_v1_soctherm_data = { static struct soctherm_throttle battery_oc_throttle = { .throt_mode = BRIEF, .polarity = SOCTHERM_ACTIVE_LOW, - .priority = 100, + .priority = 50, + .intr = true, + .alarm_cnt_threshold = 15, + .alarm_filter = 5100000, .devs = { [THROTTLE_DEV_CPU] = { .enable = true, @@ -804,7 +807,12 @@ int __init ardbeg_soctherm_init(void) pmu_board_info.board_id); /* Enable soc_therm OC throttling on selected platforms */ - switch (pmu_board_info.board_id) { + switch (board_info.board_id) { + case BOARD_E1971: + memcpy(&ardbeg_soctherm_data.throttle[THROTTLE_OC4], + &battery_oc_throttle, + sizeof(battery_oc_throttle)); + break; case BOARD_P1761: memcpy(&ardbeg_soctherm_data.throttle[THROTTLE_OC4], &battery_oc_throttle, diff --git a/arch/arm/mach-tegra/board-tn8-sysedp.c b/arch/arm/mach-tegra/board-tn8-sysedp.c index b0008e0e65b3..e9f335e05de6 100644 --- a/arch/arm/mach-tegra/board-tn8-sysedp.c +++ b/arch/arm/mach-tegra/board-tn8-sysedp.c @@ -136,10 +136,28 @@ struct sysedp_reactive_capping_platform_data tn8_voltmon_oc1_platdata = { static struct platform_device tn8_sysedp_reactive_capping_oc1 = { .name = "sysedp_reactive_capping", - .id = -1, + .id = 0, .dev = { .platform_data = &tn8_voltmon_oc1_platdata } }; +struct sysedp_reactive_capping_platform_data tn8_battery_oc4_platdata = { + .max_capping_mw = 15000, + .step_alarm_mw = 1000, + .step_relax_mw = 500, + .relax_ms = 250, + .sysedpc = { + .name = "battery_oc4" + }, + .irq = TEGRA_SOC_OC_IRQ_BASE + TEGRA_SOC_OC_IRQ_4, + .irq_flags = IRQF_ONESHOT | IRQF_TRIGGER_FALLING, +}; + +static struct platform_device tn8_sysedp_reactive_capping_oc4 = { + .name = "sysedp_reactive_capping", + .id = 1, + .dev = { .platform_data = &tn8_battery_oc4_platdata } +}; + void __init tn8_sysedp_dynamic_capping_init(void) { @@ -177,4 +195,7 @@ void __init tn8_sysedp_dynamic_capping_init(void) r = platform_device_register(&tn8_sysedp_reactive_capping_oc1); WARN_ON(r); + + r = platform_device_register(&tn8_sysedp_reactive_capping_oc4); + WARN_ON(r); } diff --git a/arch/arm/mach-tegra/tegra11_soctherm.c b/arch/arm/mach-tegra/tegra11_soctherm.c index 351bb854b7e5..6f4b3f081f71 100644 --- a/arch/arm/mach-tegra/tegra11_soctherm.c +++ b/arch/arm/mach-tegra/tegra11_soctherm.c @@ -2103,7 +2103,7 @@ static int soctherm_handle_alarm(enum soctherm_throttle_id alarm) break; case THROTTLE_OC4: - pr_info("soctherm: Successfully handled OC4 alarm\n"); + pr_debug("soctherm: Successfully handled OC4 alarm\n"); /* TODO: add OC4 alarm handling code here */ rv = 0; break; |