diff options
| author | Alex Frid <afrid@nvidia.com> | 2014-06-30 18:14:54 -0700 |
|---|---|---|
| committer | Mandar Padmawar <mpadmawar@nvidia.com> | 2014-07-04 06:14:05 -0700 |
| commit | c0e0ba01f19ee1d6c0202b277a18607b7f43f32b (patch) | |
| tree | dbc6cf2778a0165a3ebb5e2a2c9b2327c9132401 /arch/arm | |
| parent | 1be10e6325b730e8d4d6854965f66a147f0c2863 (diff) | |
ARM: tegra: ardbeg: Lower E1733 voltage map bottom
Lower E1733 voltage map bottom from 700mV to 650mV on Tegra13
platforms.
Change-Id: Id52712f364e67e50fd7a5778d55c36536736c764
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/433758
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Tested-by: Anand Bhatia <anandb@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/board-ardbeg-power.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/board-ardbeg-power.c b/arch/arm/mach-tegra/board-ardbeg-power.c index accb119fab63..df6a9aeed81f 100644 --- a/arch/arm/mach-tegra/board-ardbeg-power.c +++ b/arch/arm/mach-tegra/board-ardbeg-power.c @@ -164,8 +164,13 @@ static struct tegra_cl_dvfs_cfg_param e1733_ardbeg_cl_dvfs_param = { .scale_out_ramp = 0x0, }; -/* E1733 volatge map. Fixed 10mv steps from 700mv to 1400mv */ -#define E1733_CPU_VDD_MAP_SIZE ((1400000 - 700000) / 10000 + 1) +/* E1733 volatge map. Fixed 10mv steps from VDD_MIN to 1400mv */ +#ifdef CONFIG_ARCH_TEGRA_13x_SOC +#define E1733_CPU_VDD_MIN 650000 +#else +#define E1733_CPU_VDD_MIN 700000 +#endif +#define E1733_CPU_VDD_MAP_SIZE ((1400000 - E1733_CPU_VDD_MIN) / 10000 + 1) static struct voltage_reg_map e1733_cpu_vdd_map[E1733_CPU_VDD_MAP_SIZE]; static inline void e1733_fill_reg_map(int minor_ver) { @@ -173,7 +178,7 @@ static inline void e1733_fill_reg_map(int minor_ver) int reg_init_value = (minor_ver == 2) ? 0x1e : 0xa; for (i = 0; i < E1733_CPU_VDD_MAP_SIZE; i++) { e1733_cpu_vdd_map[i].reg_value = i + reg_init_value; - e1733_cpu_vdd_map[i].reg_uV = 700000 + 10000 * i; + e1733_cpu_vdd_map[i].reg_uV = E1733_CPU_VDD_MIN + 10000 * i; } } |