diff options
| author | Loren HUANG <b02279@freescale.com> | 2014-04-02 17:15:12 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2014-04-16 08:58:15 -0500 |
| commit | c79b718f7336310a7515696dc8100892e4390e43 (patch) | |
| tree | b04e1c1930158e4e02526653faff67f6bf9d9110 /arch/arm | |
| parent | 716b9bdf68d0a49c1cd75978615fbb8ada98a866 (diff) | |
ENGR00306443-1 mx6sx:Update the gc400t QoS
Per SoC team recommandation, update the gc400t QoS value to write 2
and Read 8. It can improve gpu performance in most case.
3d fill: 165->172Mpixel/s
2d fill: 190->228Mpixel/s
Signed-off-by: Loren HUANG <b02279@freescale.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-imx/mach-imx6sx.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c index 8b61e1afde3a..96c79a0bb4f5 100644 --- a/arch/arm/mach-imx/mach-imx6sx.c +++ b/arch/arm/mach-imx/mach-imx6sx.c @@ -153,6 +153,24 @@ static const struct of_dev_auxdata imx6sx_auxdata_lookup[] __initconst = { { /* sentinel */ } }; +static inline void imx6sx_qos_init(void) +{ + struct device_node *np; + void __iomem *src_base; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-qosc"); + if (!np) + return; + src_base = of_iomap(np, 0); + WARN_ON(!src_base); + writel_relaxed(0, src_base); /* Disable clkgate & soft_rst */ + writel_relaxed(0, src_base+0x60); /* Enable all masters */ + writel_relaxed(0, src_base+0x1400); /* Disable clkgate & soft_rst for gpu */ + writel_relaxed(0x0f000222, src_base+0x1400+0xd0); /* Set Write QoS 2 for gpu */ + writel_relaxed(0x0f000822, src_base+0x1400+0xe0); /* Set Read QoS 8 for gpu */ + return; +} + static void __init imx6sx_init_machine(void) { struct device *parent; @@ -169,6 +187,7 @@ static void __init imx6sx_init_machine(void) imx6sx_enet_init(); imx_anatop_init(); imx6_pm_init(); + imx6sx_qos_init(); } static void __init imx6sx_init_late(void) |