diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2016-01-26 15:37:15 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2016-01-28 18:54:28 +0800 |
| commit | 0f1104b78942d48752440d98e70c81c3e799cfa0 (patch) | |
| tree | 7e93efd1026348b2528ff4f184cc89c3ac9bf238 /arch/arm | |
| parent | 30392c3e0ec794bff4a0dcbd7c300c826f95e89d (diff) | |
MLK-12262-3 ARM: imx: reduce DDR3 normal frequency to 400MHz for i.MX7D TO1.1
i.MX7D TO1.1 only supports DDR3 running at max frequency of 400MHz,
update busfreq driver accordingly.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-imx/busfreq-imx.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-imx/ddr3_freq_imx7d.S | 6 |
2 files changed, 12 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/busfreq-imx.c b/arch/arm/mach-imx/busfreq-imx.c index 1d8be886e590..49eca5e96db5 100644 --- a/arch/arm/mach-imx/busfreq-imx.c +++ b/arch/arm/mach-imx/busfreq-imx.c @@ -1128,9 +1128,16 @@ static int busfreq_probe(struct platform_device *pdev) TT_ATTRIB_NON_CACHEABLE_1M; } - if (cpu_is_imx7d()) + if (cpu_is_imx7d()) { + ddr_type = imx_ddrc_get_ddr_type(); + /* reduce ddr3 normal rate to 400M due to CKE issue on TO1.1 */ + if (imx_get_soc_revision() == IMX_CHIP_REVISION_1_1 && + ddr_type == IMX_DDR_TYPE_DDR3) { + ddr_normal_rate = 400000000; + pr_info("ddr3 normal rate changed to 400MHz for TO1.1.\n"); + } err = init_ddrc_ddr_settings(pdev); - else if (cpu_is_imx6sx() || cpu_is_imx6ul()) { + } else if (cpu_is_imx6sx() || cpu_is_imx6ul()) { ddr_type = imx_mmdc_get_ddr_type(); if (ddr_type == IMX_DDR_TYPE_DDR3) err = init_mmdc_ddr3_settings_imx6_up(pdev); diff --git a/arch/arm/mach-imx/ddr3_freq_imx7d.S b/arch/arm/mach-imx/ddr3_freq_imx7d.S index 6b706f4b46eb..bc132d3fa837 100644 --- a/arch/arm/mach-imx/ddr3_freq_imx7d.S +++ b/arch/arm/mach-imx/ddr3_freq_imx7d.S @@ -314,12 +314,12 @@ cmp r7, #0x10 beq 22f - ldr r7, =0x1d1d1d1d + ldr r7, =0x40404040 str r7, [r5, #DDRPHY_CA_WLDSKEW_CON0] - ldr r7, =0x10101010 + ldr r7, =0x18181818 str r7, [r5, #DDRPHY_CA_DSKEW_CON0] str r7, [r5, #DDRPHY_CA_DSKEW_CON1] - ldr r7, =0x1d1d1010 + ldr r7, =0x40401818 str r7, [r5, #DDRPHY_CA_DSKEW_CON2] b 23f 22: |