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authorPrashant Gaikwad <pgaikwad@nvidia.com>2012-03-27 16:12:57 +0530
committerSimone Willett <swillett@nvidia.com>2012-04-03 17:52:02 -0700
commit55affcc6a7eccfbdd9f1c36787d0f90fc45634ed (patch)
tree2cb4532f358177e9420445653602e36b35363f4b /arch/arm
parent92496e563d86ac9696c138b76d11eaa9cf2b97d8 (diff)
arm: tegra: pm: Update CPU complex resume
Completely removed PLLP restoration from CPU complex resume on Tegra2 platforms (too late: PLLP is restored from AVP warm boot code) Bug 952200 Bug 931285 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/92523 (cherry picked from commit 066dc172010f1a5ea5a375e1cbdcf162ab206d63) Change-Id: I1a31793db8ee1fda5a947d69890e3118f0d3cdab Reviewed-on: http://git-master/r/93562 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-tegra/pm.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 6e8b0782e9b9..859694cd1601 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -368,14 +368,6 @@ static void restore_cpu_complex(u32 mode)
BUG_ON(cpu != 0);
- /* restore original PLL settings */
-#ifdef CONFIG_ARCH_TEGRA_2x_SOC
- writel(tegra_sctx.pllp_misc, clk_rst + CLK_RESET_PLLP_MISC);
- writel(tegra_sctx.pllp_base, clk_rst + CLK_RESET_PLLP_BASE);
- writel(tegra_sctx.pllp_outa, clk_rst + CLK_RESET_PLLP_OUTA);
- writel(tegra_sctx.pllp_outb, clk_rst + CLK_RESET_PLLP_OUTB);
-#endif
-
/* Is CPU complex already running on PLLX? */
reg = readl(clk_rst + CLK_RESET_CCLK_BURST);
policy = (reg >> CLK_RESET_CCLK_BURST_POLICY_SHIFT) & 0xF;