diff options
| author | Richard Zhu <r65037@freescale.com> | 2013-07-09 13:40:07 +0800 |
|---|---|---|
| committer | Richard Zhu <r65037@freescale.com> | 2013-07-10 15:53:23 +0800 |
| commit | d95fc35f88e270b67df7bacbffa374c57be4a164 (patch) | |
| tree | 2c7bce094d955743823a1804d4581e3ed192757f /arch/arm | |
| parent | a8d2f14f4c9b7299f6b326345a7c89658a5de150 (diff) | |
ENGR00270192 imx: pcie: toggle bit18 of grp1 fix pcie pm issue.
Set bit18 of gpr1 before enter into supend, and clean it
after resume, can fix the following errata.
Errata ERR005723_PCIe PCIe does not support L2 Power Down.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-mx6/pm.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/pm.c b/arch/arm/mach-mx6/pm.c index 6e306c279d20..46d8196eae35 100644 --- a/arch/arm/mach-mx6/pm.c +++ b/arch/arm/mach-mx6/pm.c @@ -342,6 +342,14 @@ static int mx6_suspend_enter(suspend_state_t state) return -EINVAL; } + /* + * L2 can exit by 'reset' or Inband beacon (from remote EP) + * toggling phy_powerdown has same effect as 'inband beacon' + * So, toggle bit18 of GPR1, to fix errata + * "PCIe PCIe does not support L2 Power Down" + */ + __raw_writel(__raw_readl(IOMUXC_GPR1) | (1 << 18), IOMUXC_GPR1); + if (state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY) { local_flush_tlb_all(); @@ -405,6 +413,14 @@ static int mx6_suspend_enter(suspend_state_t state) cpu_do_idle(); } + /* + * L2 can exit by 'reset' or Inband beacon (from remote EP) + * toggling phy_powerdown has same effect as 'inband beacon' + * So, toggle bit18 of GPR1, to fix errata + * "PCIe PCIe does not support L2 Power Down" + */ + __raw_writel(__raw_readl(IOMUXC_GPR1) & (~(1 << 18)), IOMUXC_GPR1); + return 0; } |