diff options
| author | Harry Hong <hhong@nvidia.com> | 2011-06-20 13:46:37 +0900 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-07-01 10:39:00 -0700 |
| commit | 761c2cf3c0c61e7dc49f22eab3f41797418f8b78 (patch) | |
| tree | 87d6d733f689d6a23a8cc16e3154b693d6a990f8 /arch/arm | |
| parent | 1ce611a5c712dd2392a6701156776e699c1acb12 (diff) | |
arm: tegra3: pinmux: Adding SFIO3 mode for VI_MCLK
SFIO3 on VI_MCLK pin is needed to output vi_sensor clk.
bug 839517
Change-Id: Ied7408a8711b0256b8fe98eea67c873a7b168bcb
Reviewed-on: http://git-master/r/37426
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/pinmux-t3-tables.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t3-tables.c b/arch/arm/mach-tegra/pinmux-t3-tables.c index 30cf63d860b9..59c31b46bd5a 100644 --- a/arch/arm/mach-tegra/pinmux-t3-tables.c +++ b/arch/arm/mach-tegra/pinmux-t3-tables.c @@ -193,7 +193,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { PINGROUP(VI_D10, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x314c), PINGROUP(VI_D11, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x3150), PINGROUP(VI_PCLK, VI, RSVD1, SDMMC2, VI, RSVD2, RSVD, INPUT, 0x3154), - PINGROUP(VI_MCLK, VI, VI, INVALID, INVALID, INVALID, RSVD, INPUT, 0x3158), + PINGROUP(VI_MCLK, VI, INVALID, INVALID, INVALID, VI, RSVD, INPUT, 0x3158), PINGROUP(VI_VSYNC, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x315c), PINGROUP(VI_HSYNC, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x3160), PINGROUP(UART2_RXD, UART, IRDA, SPDIF, UARTA, SPI4, RSVD, INPUT, 0x3164), |