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authorRajendra Nayak <rnayak@codeaurora.org>2015-10-01 14:56:02 +0530
committerAndy Gross <agross@codeaurora.org>2015-10-13 16:40:01 -0500
commit89c7e671289d142cff2cb0b98ef7c92de5deee03 (patch)
tree1d39bd53e3b81e6a90f0ed864ce47274dedf93c5 /arch/arm
parent8eb84480cc6df9f4b5cbce51e20d86e73f04575c (diff)
arm: dts: qcom: Add #power-domain-cells property
clock controller nodes which also support power domains (gdscs') need to have a #power-domain-cells property. Add these for gcc and mmcc nodes of msm8974, gcc of apq8084 and msm8916. Also update gcc and mmcc bindings for it. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/qcom-apq8084.dtsi1
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi2
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 0554fbd72c40..fcffecae3e67 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -221,6 +221,7 @@
compatible = "qcom,gcc-apq8084";
#clock-cells = <1>;
#reset-cells = <1>;
+ #power-domain-cells = <1>;
reg = <0xfc400000 0x4000>;
};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index f6791269dc65..0df5b62e93c7 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -233,6 +233,7 @@
compatible = "qcom,gcc-msm8974";
#clock-cells = <1>;
#reset-cells = <1>;
+ #power-domain-cells = <1>;
reg = <0xfc400000 0x4000>;
};
@@ -245,6 +246,7 @@
compatible = "qcom,mmcc-msm8974";
#clock-cells = <1>;
#reset-cells = <1>;
+ #power-domain-cells = <1>;
reg = <0xfd8c0000 0x6000>;
};